Stefano Di Carlo

发表

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2005 .

Are IEEE-1500-Compliant Cores Really Compliant to the Standard?

Alfredo Benso, Paolo Prinetto, Alberto Bosio, 2009, IEEE Design & Test of Computers.

A Unique March Test Algorithm for the Wide Spread of Realistic Memory Faults in SRAMs

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2006, 2006 IEEE Design and Diagnostics of Electronic Circuits and systems.

Automating defects simulation and fault modeling for SRAMs

Paolo Prinetto, Stefano Di Carlo, Zaid Al-Ars, 2008, 2008 IEEE International High Level Design Validation and Test Workshop.

Automatic March tests generation for multi-port SRAMs

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2006, Third IEEE International Workshop on Electronic Design, Test and Applications (DELTA'06).

A graph-based representation of Gene Expression profiles in DNA microarrays

Alfredo Benso, Gianfranco Politano, Stefano Di Carlo, 2008, 2008 IEEE Symposium on Computational Intelligence in Bioinformatics and Computational Biology.

SSDExplorer: A Virtual Platform for Performance/Reliability-Oriented Fine-Grained Design Space Exploration of Solid State Drives

Paolo Prinetto, Piero Olivo, Davide Bertozzi, 2015, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Towards drift correction in chemical sensors using an evolutionary strategy

Giovanni Squillero, Alberto Paolo Tonda, Stefano Di Carlo, 2010, GECCO '10.

A programmable BIST architecture for clusters of multiple-port SRAMs

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).

Automatic March tests generation for static and dynamic faults in SRAMs

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2005, European Test Symposium (ETS'05).

On applying the set covering model to reseeding

Paolo Prinetto, Stefano Di Carlo, Silvia Chiusano, 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

A novel methodology to increase fault tolerance in autonomous FPGA-based systems

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2014, 2014 IEEE 20th International On-Line Testing Symposium (IOLTS).

Digital, memory and mixed-signal test engineering education: five centres of competence in Europe

Paolo Prinetto, Stefano Di Carlo, Marie-Lise Flottes, 2004, Proceedings. DELTA 2004. Second IEEE International Workshop on Electronic Design, Test and Applications.

Online self-repair of FIR filters

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2003, IEEE Design & Test of Computers.

Analysis of System-Failure Rate Caused by Soft-Errors using a UML-Based Systematic Methodology in an SoC

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2007, 13th IEEE International On-Line Testing Symposium (IOLTS 2007).

CLERECO, Cross-Layer Early Reliability Evaluation for the Computing cOntinuum, FP7

Stefano Di Carlo, 2017 .

An optimal algorithm for the automatic generation of March tests

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2002, Proceedings 2002 Design, Automation and Test in Europe Conference and Exhibition.

FLARE: A design environment for FLASH-based space applications

Paolo Prinetto, Stefano Di Carlo, Maurizio Caramia, 2009, 2009 IEEE International High Level Design Validation and Test Workshop.

A Computational Study to Identify TP53 and SREBF2 as Regulation Mediators of miR-214 in Melanoma Progression

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2014, BIOINFORMATICS.

MarciaTesta: An Automatic Generator of Test Programs for Microprocessors' Data Caches

Paolo Prinetto, Stefano Di Carlo, Marco Indaco, 2011, 2011 Asian Test Symposium.

Alternatives to Fault Injections for Early Safety/Security Evaluations

Alessandro Savino, Giorgio Di Natale, Alberto Bosio, 2019, 2019 IEEE European Test Symposium (ETS).

Exploiting Evolution for an Adaptive Drift-Robust Classifier in Chemical Sensing

Giovanni Squillero, Alberto Paolo Tonda, Stefano Di Carlo, 2010, EvoApplications.

A cDNA Microarray Gene Expression Data Classifier for Clinical Diagnostics Based on Graph Theory

Alfredo Benso, Gianfranco Politano, Stefano Di Carlo, 2011, IEEE/ACM Transactions on Computational Biology and Bioinformatics.

A unifying formalism to support automated synthesis of SBSTs for embedded caches

Paolo Prinetto, Stefano Di Carlo, Marco Indaco, 2011, 2011 9th East-West Design & Test Symposium (EWDTS).

On Enhancing Fault Injection's Capabilities and Performances for Safety Critical Systems

Paolo Prinetto, Stefano Di Carlo, Giulio Gambardella, 2014, 2014 17th Euromicro Conference on Digital System Design.

Accounting for Post-Transcriptional Regulation in Boolean Networks Based Regulatory Models

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2013, IWBBIO.

Cross-Layer Early Reliability Evaluation for the Computing cOntinuum

Giorgio Di Natale, Stefano Di Carlo, Dimitris Gizopoulos, 2014, 2014 17th Euromicro Conference on Digital System Design.

Combining homolog and motif similarity data with Gene Ontology relationships for protein function prediction

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2012, 2012 IEEE International Conference on Bioinformatics and Biomedicine.

Programmable built-in self-testing of embedded RAM clusters in system-on-chip architectures

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2003, IEEE Commun. Mag..

Bayesian models for early cross-layer reliability analysis and design space exploration

Alessandro Savino, Stefano Di Carlo, Alberto Carelli, 2019, 2019 IEEE 25th International Symposium on On-Line Testing and Robust System Design (IOLTS).

Test infrastructures evaluation at transaction level

Paolo Prinetto, Stefano Di Carlo, Nadereh Hatami, 2009, 2009 International Test Conference.

RT Level vs. Microarchitecture-Level Reliability Assessment: Case Study on ARM(R) Cortex(R)-A9 CPU

Stefano Di Carlo, Dimitris Gizopoulos, Riccardo Mariani, 2017, 2017 47th Annual IEEE/IFIP International Conference on Dependable Systems and Networks Workshops (DSN-W).

A portable open-source controller for safe Dynamic Partial Reconfiguration on Xilinx FPGAs

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2015, 2015 25th International Conference on Field Programmable Logic and Applications (FPL).

A 22n March Test for Realistic Static Linked Faults in SRAMs

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2006, Eleventh IEEE European Test Symposium (ETS'06).

Fault mitigation strategies for CUDA GPUs

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2013, 2013 IEEE International Test Conference (ITC).

Cross-layer early reliability evaluation: Challenges and promises

Giorgio Di Natale, Stefano Di Carlo, Dimitris Gizopoulos, 2014, 2014 IEEE 20th International On-Line Testing Symposium (IOLTS).

Using multi-level Petri nets models to simulate microbiota resistance to antibiotics

Alfredo Benso, Gianfranco Politano, Stefano Di Carlo, 2017, 2017 IEEE International Conference on Bioinformatics and Biomedicine (BIBM).

Cross-Layer Soft-Error Resilience Analysis of Computing Systems

Alessandro Savino, Alberto Bosio, Stefano Di Carlo, 2020, 2020 50th Annual IEEE-IFIP International Conference on Dependable Systems and Networks-Supplemental Volume (DSN-S).

Performance and Reliability Analysis of Cross-Layer Optimizations of NAND Flash Controllers

Paolo Prinetto, Piero Olivo, Davide Bertozzi, 2015, ACM Trans. Embed. Comput. Syst..

Modeling biological complexity using Biology System Description Language (BiSDL)

Alfredo Benso, Gianfranco Politano, Stefano Di Carlo, 2018, 2018 IEEE International Conference on Bioinformatics and Biomedicine (BIBM).

Probabilistic estimation of the application-level impact of precision scaling in approximate computing applications

Alessandro Savino, Stefano Di Carlo, Marcello Traiola, 2019, Microelectronics Reliability.

March AB, March AB1: new March tests for unlinked dynamic memory faults

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2005, IEEE International Conference on Test, 2005..

Single-Event Upset Analysis and Protection in High Speed Circuits

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2006, Eleventh IEEE European Test Symposium (ETS'06).

Efficient Simulation of Structural Faults for the Reliability Evaluation at System-Level

Paolo Prinetto, Stefano Di Carlo, Hans-Joachim Wunderlich, 2010, 2010 19th IEEE Asian Test Symposium.

Combining Cluster Sampling and ACE analysis to improve fault-injection based reliability evaluation of GPU-based systems

Stefano Di Carlo, Alessandro Vallero, S. Carlo, 2019, 2019 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

A FPGA-Based Reconfigurable Software Architecture for Highly Dependable Systems

Paolo Prinetto, Stefano Di Carlo, Alberto Scionti, 2009, 2009 Asian Test Symposium.

Efficient multi-level fault simulation of HW/SW systems for structural faults

Paolo Prinetto, Stefano Di Carlo, Hans-Joachim Wunderlich, 2011, Science China Information Sciences.

On the on-line functional test of the Reorder Buffer memory in superscalar processors

Stefano Di Carlo, Matteo Sonza Reorda, Ernesto Sánchez, 2013, 2013 IEEE 16th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

System reliability evaluation using concurrent multi-level simulation of structural faults

Paolo Prinetto, Stefano Di Carlo, Hans-Joachim Wunderlich, 2010, 2010 IEEE International Test Conference.

ZipStream: Improving dependability in dynamic partial reconfiguration

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2013, 2013 8th IEEE Design and Test Symposium.

Test engineering education in Europe: the EuNICE-Test project

Paolo Prinetto, Stefano Di Carlo, Marie-Lise Flottes, 2003, Proceedings 2003 IEEE International Conference on Microelectronic Systems Education. MSE'03.

Special session: How approximate computing impacts verification, test and reliability

Alberto Bosio, Stefano Di Carlo, Lukás Sekanina, 2018, 2018 IEEE 36th VLSI Test Symposium (VTS).

Ef3S: An evaluation framework for flash-based systems

Paolo Prinetto, Stefano Di Carlo, Marco Indaco, 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).

Using Boolean networks to model post-transcriptional regulation in gene regulatory networks

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2014, J. Comput. Sci..

Influence of Parasitic Capacitance Variations on 65 nm and 32 nm Predictive Technology Model SRAM Core-Cells

Alessandro Savino, Paolo Prinetto, Stefano Di Carlo, 2008, 2008 17th Asian Test Symposium.

Side-channel analysis of SEcube™ platform

Paolo Prinetto, Stefano Di Carlo, Alberto Carelli, 2017, 2017 IEEE East-West Design & Test Symposium (EWDTS).

Exploring Design Dimensions in Flash-based Mass-memory Devices

Paolo Prinetto, Stefano Di Carlo, Michele Fabiano, 2009 .

Early Component-Based System Reliability Analysis for Approximate Computing Systems

Alessandro Savino, Stefano Di Carlo, Dimitris Gizopoulos, 2016 .

On-Line Instruction-Checking in Pipelined Microprocessors

Giorgio Di Natale, Stefano Di Carlo, Riccardo Mariani, 2008, 2008 17th Asian Test Symposium.

POLITECNICO DI TORINO Repository ISTITUZIONALE Building Gene Expression Profile Classifiers with a Simple and Efficient Rejection Option in R /

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2022 .

Validation of a software dependability tool via fault injection experiments

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2001, Proceedings Seventh International On-Line Testing Workshop.

Flash-memories in Space Applications: Trends and Challenges

Paolo Prinetto, Stefano Di Carlo, Michele Fabiano, 2009 .

A cloud-based approach for Gene Regulatory Networks dynamics simulations

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2015, 2015 4th Mediterranean Conference on Embedded Computing (MECO).

Models in Memory Testing

Paolo Prinetto, Stefano Di Carlo, P. Prinetto, 2010 .

AIDI: An adaptive image denoising FPGA-based IP-core for real-time applications

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2013, 2013 NASA/ESA Conference on Adaptive Hardware and Systems (AHS-2013).

Genetic Defect Based March Test Generation for SRAM

Gianfranco Politano, Alessandro Savino, Paolo Prinetto, 2011, EvoApplications.

Integration of STT-MRAM model into CACTI simulator

Elena I. Vatajelu, Paolo Prinetto, Stefano Di Carlo, 2014, 2014 9th International Design and Test Symposium (IDT).

Computational Tools for Applying Multi-level Models to Synthetic Biology

Alfredo Benso, Stefano Di Carlo, Gianfranco Michele Maria Politano, 2018 .

A Systematic Approach for Evaluating Satellite Communications Systems

Alessandro Savino, Paolo Prinetto, Stefano Di Carlo, 2008 .

SIFI: AMD southern islands GPU microarchitectural level fault injector

Stefano Di Carlo, Dimitris Gizopoulos, Alessandro Vallero, 2017, 2017 IEEE 23rd International Symposium on On-Line Testing and Robust System Design (IOLTS).

An On-Line Testing Technique for the Scheduler Memory of a GPGPU

Stefano Di Carlo, Matteo Sonza Reorda, Josie E. Rodriguez Condia, 2020, IEEE Access.

Validation & Verification of an EDA automated synthesis tool

Paolo Prinetto, Stefano Di Carlo, Marco Indaco, 2011, 2011 IEEE 6th International Design and Test Workshop (IDT).

Multi-faceted microarchitecture level reliability characterization for NVIDIA and AMD GPUs

Stefano Di Carlo, Dimitris Gizopoulos, Alessandro Vallero, 2018, 2018 IEEE 36th VLSI Test Symposium (VTS).

Differential gene expression graphs: A data structure for classification in DNA microarrays

Alfredo Benso, Gianfranco Politano, Stefano Di Carlo, 2008, 2008 8th IEEE International Conference on BioInformatics and BioEngineering.

IEEE Standard 1500 Compliance Verification for Embedded Cores

Yervant Zorian, Alfredo Benso, Paolo Prinetto, 2008, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A New miRNA Motif Protects Pathways Expression in Gene Regulatory Networks

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2013, IWBBIO.

FEMIP: A high performance FPGA-based features extractor & matcher for space applications

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

Software-Based Self-Test of Set-Associative Cache Memories

Alessandro Savino, Paolo Prinetto, Stefano Di Carlo, 2011, IEEE Transactions on Computers.

Automatic March Tests Generations for Static Linked Faults in SRAMs

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2006, Proceedings of the Design Automation & Test in Europe Conference.

Memory read faults: taxonomy and automatic test generation

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2001, Proceedings 10th Asian Test Symposium.

March AB, a state-of-the-art march test for realistic static linked faults and dynamic faults in SRAMs

Giorgio Di Natale, Paolo Prinetto, Alberto Bosio, 2007, IET Comput. Digit. Tech..

Cross-layer system reliability assessment framework for hardware faults

Gianfranco Politano, Alessandro Savino, Giorgio Di Natale, 2016, 2016 IEEE International Test Conference (ITC).

HD/sup 2/BIST: a hierarchical framework for BIST scheduling, data patterns delivering and diagnosis in SoCs

Yervant Zorian, Alfredo Benso, Paolo Prinetto, 2000, Proceedings International Test Conference 2000 (IEEE Cat. No.00CH37159).

Functional testing approaches for “BIFST-able” tlm_fifo

Paolo Prinetto, Stefano Di Carlo, Zainalabedin Navabi, 2008, 2008 IEEE International High Level Design Validation and Test Workshop.

An improved fault mitigation strategy for CUDA Fermi GPUs

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2014 .

System Level Testing via TLM 2.0 Debug Transport Interface

Alessandro Savino, Paolo Prinetto, Stefano Di Carlo, 2009, 2009 24th IEEE International Symposium on Defect and Fault Tolerance in VLSI Systems.

Trading-off reliability and performance in FPGA-based reconfigurable heterogeneous systems

Stefano Di Carlo, Alberto Carelli, Alessandro Vallero, 2018, 2018 13th International Conference on Design & Technology of Integrated Systems In Nanoscale Era (DTIS).

CyTRANSFINDER: a Cytoscape 3.3 plugin for three-component (TF, gene, miRNA) signal transduction pathway construction

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2016, BMC Bioinformatics.

Design Issues and Challenges of File Systems for Flash Memories

Paolo Prinetto, Stefano Di Carlo, Michele Fabiano, 2011 .

Data criticality estimation in software applications

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2003, International Test Conference, 2003. Proceedings. ITC 2003..

Securing Soft IP Cores in FPGA based Reconfigurable Mobile Heterogeneous Systems pdf

Alessandro Savino, Cataldo Basile, Stefano Di Carlo, 2019, ArXiv.

A Computational Pipeline to Identify New Potential Regulatory Motifs in Melanoma Progression

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2014, BIOSTEC.

EDACs and test integration strategies for NAND flash memories

Paolo Prinetto, Stefano Di Carlo, Roberto Piazza, 2010, 2010 East-West Design & Test Symposium (EWDTS).

Increasing the robustness of CUDA Fermi GPU-based systems

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2013, 2013 IEEE 19th International On-Line Testing Symposium (IOLTS).

Exploiting code mobility for dynamic binary obfuscation

Paolo Falcarin, Stefano Di Carlo, Alessandro Cabutto, 2011, 2011 World Congress on Internet Security (WorldCIS-2011).

Statistical Reliability Estimation of Microprocessor-Based Systems

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2012, IEEE Transactions on Computers.

A watchdog processor to detect data and control flow errors

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2003, 9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003..

DNA Pool Analysis-based Forgery-Detection of Dairy Products

Alfredo Benso, Gianfranco Politano, Pier Luigi Acutis, 2018, International Journal of Electrical and Computer Engineering (IJECE).

A software-based self test of CUDA Fermi GPUs

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2013, 2013 18th IEEE European Test Symposium (ETS).

Innovative practices session 5C automotive test solutions

Stefano Di Carlo, Pete Sarson, 2017, VTS.

Automated synthesis of SEU tolerant architectures from OO descriptions

Paolo Prinetto, Stefano Di Carlo, Silvia Chiusano, 2002, Proceedings of the Eighth IEEE International On-Line Testing Workshop (IOLTW 2002).

On integrating a proprietary and a commercial architecture for optimal BIST performances in SoCs

Alfredo Benso, Paolo Prinetto, Fabio Ricciato, 2000, Proceedings 2000 International Conference on Computer Design.

Microarchitecture level reliability comparison of modern GPU designs: First findings

Stefano Di Carlo, Dimitris Gizopoulos, Alessandro Vallero, 2017, 2017 IEEE International Symposium on Performance Analysis of Systems and Software (ISPASS).

Static analysis of SEU effects on software applications

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2002, Proceedings. International Test Conference.

FunMod: A Cytoscape Plugin for Identifying Functional Modules in Undirected Protein–Protein Networks

Alfredo Benso, Stefano Di Carlo, Elisa Ficarra, 2014, Genom. Proteom. Bioinform..

A computationally inferred regulatory heart aging model including post-transcriptional regulations

Gianfranco Politano, Stefano Di Carlo, F. Logrand, 2016, 2016 IEEE International Conference on Bioinformatics and Biomedicine (BIBM).

Increasing pattern recognition accuracy for chemical sensing by evolutionary based drift compensation

Giovanni Squillero, Alberto Paolo Tonda, Stefano Di Carlo, 2011, Pattern Recognit. Lett..

Dependable Dynamic Partial Reconfiguration with minimal area & time overheads on Xilinx FPGAS

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

Applying March Tests to K-Way Set-Associative Cache Memories

Alessandro Savino, Paolo Prinetto, Stefano Di Carlo, 2008, 2008 13th European Test Symposium.

Identifying Sub-Network Functional Modules in Protein Undirected Networks

Alfredo Benso, Stefano Di Carlo, Elisa Ficarra, 2014, BIOINFORMATICS.

GPU cards as a low cost solution for efficient and fast classification of high dimensional gene expression datasets

Alfredo Benso, Alessandro Savino, Stefano Di Carlo, 2010 .

SSDExplorer: A virtual platform for fine-grained design space exploration of Solid State Drives

Paolo Prinetto, Piero Olivo, Davide Bertozzi, 2014, 2014 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Reliability estimation at block-level granularity of spin-transfer-torque MRAMs

Elena I. Vatajelu, Paolo Prinetto, Stefano Di Carlo, 2014, 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

Software-Based Self-Test for Reliable Applications in Railway Systems

Alfredo Benso, Alessandro Savino, Stefano Di Carlo, 2012 .

Microprocessor fault-tolerance via on-the-fly partial reconfiguration

Paolo Prinetto, Stefano Di Carlo, Andrea Miele, 2010, 2010 15th IEEE European Test Symposium.

Approximate computing design exploration through data lifetime metrics

Alessandro Savino, Stefano Di Carlo, Regis Leveugle, 2019, 2019 IEEE European Test Symposium (ETS).

An effective distributed BIST architecture for RAMs

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2000, Proceedings IEEE European Test Workshop.

SIERRA - Simulation environment for memory redundancy algorithms

Stefano Di Carlo, Said Hamdioui, Alberto Scionti, 2016, Simul. Model. Pract. Theory.

A novel algorithm and hardware architecture for fast video-based shape reconstruction of space debris

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2014, EURASIP J. Adv. Signal Process..

A fault injection methodology and infrastructure for fast single event upsets emulation on Xilinx SRAM-based FPGAs

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2014, 2014 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFT).

A cross-layer approach for new reliability-performance trade-offs in MLC NAND flash memories

Paolo Prinetto, Piero Olivo, Davide Bertozzi, 2012, 2012 Design, Automation & Test in Europe Conference & Exhibition (DATE).

The CAFA challenge reports improved protein function prediction and new functional annotations for hundreds of genes through experimental screens

Tapio Salakoski, Feng Zhang, Paolo Fontana, 2019, Genome Biology.

SATTA: A Self-Adaptive Temperature-Based TDF Awareness Methodology for Dynamically Reconfigurable FPGAs

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2015, TRETS.

A hierarchical infrastructure for SoC test management

Yervant Zorian, Alfredo Benso, Paolo Prinetto, 2003, IEEE Design & Test of Computers.

Alice in "Bio-Land": Engineering Challenges in the World of Life Sciences

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2014, IT Professional.

Design and optimization of adaptable BCH codecs for NAND flash memories

Paolo Prinetto, Stefano Di Carlo, Marco Indaco, 2013, Microprocess. Microsystems.

A Bayesian model for system level reliability estimation

Gianfranco Politano, Alessandro Savino, Stefano Di Carlo, 2015, 2015 20th IEEE European Test Symposium (ETS).

Exploring modeling and testing of NAND flash memories

Paolo Prinetto, Stefano Di Carlo, Roberto Piazza, 2010, 2010 East-West Design & Test Symposium (EWDTS).

A Functional Approach for Testing the Reorder Buffer Memory

Stefano Di Carlo, Matteo Sonza Reorda, Ernesto Sánchez, 2014, J. Electron. Test..

A Computer Aided Diagnosis System To Detect Prostate Cancer With Endorectal Multiparametric MRI

Alessandro Savino, Stefano Di Carlo, A. Benso, 2013 .

Innovative practices session 9C DFT and data for diagnostics

Kun Young Chung, Stefano Di Carlo, 2017, VTS.

Shielding Performance Monitor Counters: a double edged weapon for safety and security

Stefano Di Carlo, Alberto Carelli, Alessandro Vallero, 2018, 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS).

SAFE: A self adaptive frame enhancer FPGA-based IP-core for real-time space applications

Paolo Prinetto, Pascal Trotta, Stefano Di Carlo, 2013, 2013 8th IEEE Design and Test Symposium.

A Functional Verification based Fault Injection Environment

Alfredo Benso, Alberto Bosio, Stefano Di Carlo, 2007, 22nd IEEE International Symposium on Defect and Fault-Tolerance in VLSI Systems (DFT 2007).

A systematic analysis of a mi-RNA inter-pathway regulatory motif

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2013, Journal of Clinical Bioinformatics.

March Test Generation Revealed

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2008, IEEE Transactions on Computers.

Power-aware voltage tuning for STT-MRAM reliability

Elena I. Vatajelu, Paolo Prinetto, Stefano Di Carlo, 2015, 2015 20th IEEE European Test Symposium (ETS).

An agent-based simulation framework for complex systems

Alfredo Benso, Alessandro Savino, Stefano Di Carlo, 2012, BIOINFORMATICS 2012.

A 3D Voxel Neighborhood Classification Approach within a Multiparametric MRI Classifier for Prostate Cancer Detection

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2015, IWBBIO.

Bayesian network early reliability evaluation analysis for both permanent and transient faults

Gianfranco Politano, Alessandro Savino, Stefano Di Carlo, 2015, 2015 IEEE 21st International On-Line Testing Symposium (IOLTS).

Predicting the Impact of Functional Approximation: from Component- to Application-Level

Alessandro Savino, Alberto Bosio, Stefano Di Carlo, 2018, 2018 IEEE 24th International Symposium on On-Line Testing And Robust System Design (IOLTS).

FAUST: fault-injection script-based tool

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2003, 9th IEEE On-Line Testing Symposium, 2003. IOLTS 2003..

An area-efficient 2-D convolution implementation on FPGA for space applications

Paolo Prinetto, Stefano Di Carlo, Gabriele Tiotto, 2011, 2011 IEEE 6th International Design and Test Workshop (IDT).

FPGA-Based Remote-Code Integrity Verification of Programs in Distributed Embedded Systems

Cataldo Basile, Stefano Di Carlo, Alberto Scionti, 2012, IEEE Transactions on Systems, Man, and Cybernetics, Part C (Applications and Reviews).

"Plug & Test" at System Level via Testable TLM Primitives

Paolo Prinetto, Stefano Di Carlo, Zainalabedin Navabi, 2008, 2008 IEEE International Test Conference.

Test exploration and validation using transaction level models

Paolo Prinetto, Stefano Di Carlo, Martin Radetzki, 2009, 2009 Design, Automation & Test in Europe Conference & Exhibition.

A Low-Cost FPGA-Based Test and Diagnosis Architecture for SRAMs

Paolo Prinetto, Stefano Di Carlo, Salvador Manich, 2009, 2009 First International Conference on Advances in System Testing and Validation Lifecycle.

Specification and design of a new memory fault simulator

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2002, Proceedings of the 11th Asian Test Symposium, 2002. (ATS '02)..

SEU effect analysis in a open-source router via a distributed fault injection environment

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2001, Proceedings Design, Automation and Test in Europe. Conference and Exhibition 2001.

Using Nets-Within-Nets for Modeling Differentiating Cells in the Epigenetic Landscape

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2016, IWBBIO.

Computer-Assisted Molecular Traceability for Dairy Farming Products

Alfredo Benso, Alessandro Savino, Pier Luigi Acutis, 2016 .

PROMON: a profile monitor of software applications

Alfredo Benso, Giorgio Di Natale, Paolo Prinetto, 2005 .

A Prostate Cancer Computer Aided Diagnosis Software including Malignancy Tumor Probabilistic Classification

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2014, BIOIMAGING.

FLARES: An Aging Aware Algorithm to Autonomously Adapt the Error Correction Capability in NAND Flash Memories

Paolo Prinetto, Piero Olivo, Davide Bertozzi, 2014, ACM Trans. Archit. Code Optim..

TAURUM P2T: Advanced Secure CAN-FD Architecture for Road Vehicle

Alessandro Savino, Stefano Di Carlo, Franco Oberti, 2021, 2021 IEEE 27th International Symposium on On-Line Testing and Robust System Design (IOLTS).

Meta-Analysis of cortical inhibitory interneurons markers landscape and their performances in scRNA-seq studies.

Stefano Di Carlo, Roberta Bardini, Lorenzo Martini, 2021, 2021 IEEE International Conference on Bioinformatics and Biomedicine (BIBM).

EXT-TAURUM P2T: an Extended Secure CAN-FD Architecture for Road Vehicles pdf

Alessandro Savino, Stefano Di Carlo, Franco Oberti, 2021, ArXiv.

Exploring Deep Learning for In-Field Fault Detection in Microprocessors

Alessandro Savino, Stefano Di Carlo, Simone Dutto, 2021, 2021 Design, Automation & Test in Europe Conference & Exhibition (DATE).

FPGA-optimized Hardware acceleration for Spiking Neural Networks pdf

Alessandro Savino, Stefano Di Carlo, Alessio Carpegna, 2022, ArXiv.

Mitigation of Automotive Control Modules Hardware Replacement-based Attacks Through Hardware Signature

Alessandro Savino, Stefano Di Carlo, Filippo Parisi, 2021, 2021 51st Annual IEEE/IFIP International Conference on Dependable Systems and Networks - Supplemental Volume (DSN-S).

Special Session: Operating Systems under test: an overview of the significance of the operating system in the resiliency of the computing continuum

Alessandro Savino, Alberto Bosio, Stefano Di Carlo, 2021, 2021 IEEE 39th VLSI Test Symposium (VTS).

Guest Editorial: Special Section on Emerging Trends and Computing Paradigms for Testing, Reliability and Security in Future VLSI Systems

Alessandro Savino, Stefano Di Carlo, Peilin Song, 2021, IEEE Trans. Emerg. Top. Comput..

Efficient Neural Network Approximation via Bayesian Reasoning

Alessandro Savino, Alberto Bosio, Stefano Di Carlo, 2021, 2021 24th International Symposium on Design and Diagnostics of Electronic Circuits & Systems (DDECS).

An extended gene protein/products boolean network model including post-transcriptional regulation

Alfredo Benso, Gianfranco Politano, Alessandro Savino, 2014, Theoretical Biology and Medical Modelling.

ADAGE: An Automated Synthesis tool for Adaptive BCH-based ECC IP-Cores

Paolo Prinetto, Stefano Di Carlo, Marco Indaco, 2012, ITC 2012.

The Art of Fault Injection

Alfredo Benso, Stefano Di Carlo, A. Benso, 2011 .