Haigang Yang

发表

Revisiting and-inverter cones

Paolo Ienne, Hadi Parandeh-Afshar, Zhihong Huang, 2014, FPGA.

A 0.18μm CMOS gain-switched LNA and mixer with large dynamic range

Haigang Yang, Jinlin Yang, Bing-Ze Xue, 2008 .

A fully CMOS-integrated pH-ISFET interface circuit

S. Xia, Haigang Yang, Jinbao Wei, 2005, 2005 6th International Conference on ASIC.

Air-gap-based RF coaxial TSV and its characteristic analysis

Chao Zhang, Haigang Yang, Le Yu, 2013 .

AFully CMOS-integrated pH-ISFETInterface Circuit

S. Xia, Haigang Yang, Jinbao Wei, 2005 .

rization of RF TSV for nd Heterogeneous ICs cn

Min Xu, Haigang Yang, T. T. Jing, 2010 .

A closed-loop interface for capacitive micro-accelerometers with pulse-width-modulation force feedback

Huanming Wu, Tao Yin, Haigang Yang, 2018 .

RF-TSV design, modeling and application for 3D multi-core computer systems

Le Yu, Haigang Yang, Yuan-lu Xie, 2012 .

Performance evaluation of air-gap-based coaxial RF TSV for 3D NoC

Jia Zhang, Le Yu, Haigang Yang, 2011, 2011 IEEE/IFIP 19th International Conference on VLSI and System-on-Chip.

Optimizing Off-Chip Memory Access for Deep Neural Network Accelerator

Zhihong Huang, Haigang Yang, Yong Zheng, 2022, IEEE Transactions on Circuits and Systems II: Express Briefs.

A High Energy-Efficiency FPGA-Based LSTM Accelerator Architecture Design by Structured Pruning and Normalized Linear Quantization

Zhihong Huang, Yong Zheng, Tianli Li, 2019, 2019 International Conference on Field-Programmable Technology (ICFPT).

A Multiphase DLL With a Novel Fast-Locking Fine-Code Time-to-Digital Converter

Wei Li, Lin Li, Haigang Yang, 2015, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Design and Characterization of SEU Hardened Circuits for SRAM-Based FPGA

Hongjin Liu, Haigang Yang, Tianwen Li, 2019, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Electrical characterization of RF TSV for 3D multi-core and heterogeneous ICs

Le Yu, Min Xu, Haigang Yang, 2010, 2010 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

A survey of open source processors for FPGAs

Fei Wang, Haigang Yang, Rui Chen, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Review of advanced FPGA architectures and technologies

Jia Zhang, Le Yu, Haigang Yang, 2014 .

Overview: Emerging technologies on giga-scale FPGA implementat

Haigang Yang, Haigang Yang, 2010, Proceedings of 2010 IEEE International Symposium on Circuits and Systems.

A SAT-Based Pattern Generation Method for Diagnosis Multiple Scan Chain Faults

Fei Wang, Da Wang, Hai Gang Yang, 2011 .

mTREE: A Customized Multicast-Enabled Tree-Based Network on Chip for AI Chips

Y. Shu, Zhihong Huang, Haigang Yang, 2022, IEEE Embedded Systems Letters.

Design, measurement and analysis of CMOS polysilicon TFT operational amplifiers

Haigang Yang, Carlo Reita, Piero Migliorato, 1994, IEEE J. Solid State Circuits.

Mixed-grained CMOS field programmable analog array for smart sensory applications

Tao Yin, Haigang Yang, Qisong Wu, 2014 .

A high-speed low-power pulse-swallow divider with robustness consideration

Haigang Yang, Jie Pan, Li-wu Yang, 2008, 2008 9th International Conference on Solid-State and Integrated-Circuit Technology.

A CMOS Field Programmable Analog Array for intelligent sensory application

Haigang Yang, Qisong Wu, Tao Yin, 2013, 2013 23rd International Conference on Field programmable Logic and Applications.

NAND-NOR: A Compact, Fast, and Delay Balanced FPGA Logic Element

Wei Li, Paolo Ienne, Haigang Yang, 2017, FPGA.

Size aware placement for island style FPGAs

Yang Liu, Haigang Yang, Zhihua Li, 2014, 2014 International Conference on Field-Programmable Technology (FPT).

Architecture model and resource graph building algorithm for detailed FPGA architecture design

Wei Li, Zhihua Li, Liqun Yang, 2014 .

A semi-supervised modeling approach for performance characterization of FPGA architectures

Wei Li, Haigang Yang, Zhihua Li, 2014, 2014 24th International Conference on Field Programmable Logic and Applications (FPL).

Timing slack optimization approach using FPGA hybrid routing strategy of rip-up-retry and pathfinder

Yang Liu, Haigang Yang, Wei Yu, 2014 .

Use of VPR in Design of FPGA Architecture

Haigang Yang, Hua Zhong, Xingzheng Li, 2006, 2006 8th International Conference on Solid-State and Integrated Circuit Technology Proceedings.

A 0.8 μVRMS 8-channel front-end for EEG recording

Tao Yin, Haigang Yang, Xinxia Cai, 2019, Analog Integrated Circuits and Signal Processing.

A 0.8 μVRMS 8-channel front-end for EEG recording

Haigang Yang, Tao Yin, Guocheng Huang, 2019, Analog Integrated Circuits and Signal Processing.