A. Dhar

发表

CORDIC-based parallel architecture for one dimensional discrete Mellin transform

K. C. Ray, A. Dhar, 2016, 2016 IEEE Region 10 Conference (TENCON).

DIRECT DIGITAL FREQUENCY SYNTHESIZER DESIGN WITH MODIFIED PARABOLIC METHOD APPROXIMATION METHOD

Snigdha Madhab Ghosh, A. Dhar, S. Bhunia, 2012 .

Design and Implementation of RF Front End for Ultra Wide Band Systems

T. K. Bhattacharyya, A. Basu, P. Saha, 2005 .

VLSI implementation of discrete Mellin transform for real time scale analysis of images

A. Dhar, Amartya Mazumdar, 2009, TENCON 2009 - 2009 IEEE Region 10 Conference.

Nonvolatile and unipolar resistive switching characteristics of pulsed laser ablated NiO films

S. Ray, D. Panda, A. Dhar, 2010 .

Effect of carbon on lattice strain and hole mobility in Si1-xGex alloys

S. Banerjee, G. Kar, S. Ray, 2002 .

An array architecture for computing two-dimensional discrete Hartley transforms

Anindya Sundar Dhar, Swapna Banerjee, A. Dhar, 1991 .

An array architecture for image reconstruction using the Direct Fourier Method

Swapna Banerjee, A. Dhar, S. Mittra, 1994 .

Scanning tunneling microscopy and spectroscopy of La0.67Ca0.33MnO3 thin films grown on LaAlO3(100)

S. Ray, K. Chopra, S. Ray, 1999 .

Scanning tunnelling microscopic and spectroscopic investigation of the microstructural and electronic properties of the grain boundaries of giant magnetoresistive manganites

S. Ray, K. Chopra, A. Dhar, 1998 .

Microstructural characteristics and phonon structures in luminescence from surface oxidized Ge nanocrystals embedded in HfO2 matrix

R. Singha, S. Ray, S. Das, 2010 .

Temperature dependent photoluminescence characteristics of nanocrystalline ZnO films grown by sol–gel technique

S. Ray, S. Mandal, A. Dhar, 2008 .

Charge storage and photoluminescence characteristics of silicon oxide embedded Ge nanocrystal trilayer structures

S. Maikap, G. Kar, Je‐hun Lee, 2004 .

Metal-oxide-semiconductor structure with Ge nanocrystals

S. Maikap, S. Ray, S. Ray, 2003 .

Relationship between plasma parameters and film microstructure in radio frequency magnetron sputter deposition of barium strontium titanate

S. Ray, A. Dhar, D. Bhattacharya, 1998 .

Microstructural, chemical bonding, stress development and charge storage characteristics of Ge nanocrystals embedded in hafnium oxide

S. Manna, Samaresh Das, R. Singha, 2011 .

Fabrication of N,N′-dioctyl-3,4,9,10-perylenedicarboximide nanostructures through solvent influenced π–π stacking and their morphological impact on photovoltaic performance

J. McLeskey, A. Dhar, S. Pradhan, 2014 .

Effect of post-deposition annealing on microstructural and optical properties of barium strontium titanate thin films deposited by r.f. magnetron sputtering

S. Ray, A. Dhar, M. Mukherjee, 2001 .

Memory effect in a junction-like CdS nanocomposite/conducting polymer poly[2-methoxy-5-(2-ethylhexyloxy)1,4-phenylene-vinylene] heterostructure

S. Mondal, S. Ray, S. Das, 2008, Nanotechnology.

A review of different Sparse Arrays for DOA estimation using Subspace based algorithm

Rajen Kumar Patra, A. Dhar, 2021, 2021 2nd International Conference on Range Technology (ICORT).

Schottky Barrier Characteristics of Cobalt–Nickel Silicide/n-Si Junctions for Scaled-Si CMOS Applications

S. Ray, D. Panda, A. Dhar, 2008, IEEE Transactions on Electron Devices.

Role of growth temperature and oxygen partial pressure on the structural and electrical properties of pulsed laser deposited La1−xSrxnO3−δ thin films

S. Ray, S. Ray, A. Dhar, 2011 .

High Throughput VLSI Architecture for One Dimensional Median Filter

I. Chakrabarti, A.S. Dhar, K. C. Ray, 2008, 2008 International Conference on Signal Processing, Communications and Networking.

An Efficient VLSI Architecture for Computation of Discrete Fractional Fourier Transform

Kailash Chandra Ray, Anindya Sundar Dhar, M. V. N. V. Prasad, 2018, J. Signal Process. Syst..

An Efficient VLSI Architecture for Computation of Discrete Fractional Fourier Transform

K. C. Ray, A. Dhar, M. Prasad, 2017, Journal of Signal Processing Systems.

A fast VLSI architecture of a hierarchical block matching algorithm for motion estimation

Anindya Sundar Dhar, Kausik Ghosh, A. Dhar, 2012, Journal of Real-Time Image Processing.

Multiplierless array architecture for computing Discrete Cosine Transform

Anindya Sundar Dhar, A. Dhar, Swapna Banerjee, 1995 .

FPGA realization of a CORDIC based FFT processor for biomedical signal processing

Ayan Banerjee, Swapna Banerjee, Anindya Sundar Dhar, 2001, Microprocess. Microsystems.

Design and automation of VLSI architectures for bidirectional scan based fault localization approach in FPGA fabric aware cellular automata topologies

Ayan Palchaudhuri, Anindya Sundar Dhar, A. Dhar, 2019, J. Parallel Distributed Comput..

CORDIC Architectures: A Survey

Anindya Sundar Dhar, Boppana Lakshmi, A. Dhar, 2010, VLSI Design.

A new fraction phase based low energy frequency calibration architecture along with an ultra low power VCO design

Amitava Ghosh, A. Dhar, A. Halder, 2022, Analog Integrated Circuits and Signal Processing.

CORDIC-Based VLSI Architecture for Implementing Kaiser-Bessel Window in Real Time Spectral Analysis

Kailash Chandra Ray, Anindya Sundar Dhar, K. C. Ray, 2013, Journal of Signal Processing Systems.

CORDIC-Based VLSI Architecture for Implementing Kaiser-Bessel Window in Real Time Spectral Analysis

K. C. Ray, A. Dhar, 2013, Journal of Signal Processing Systems.

CORDIC-based unified VLSI architecture for implementing window functions for real time spectral analysis

Kailash Chandra Ray, Anindya Sundar Dhar, K. C. Ray, 2006 .

Systolizing the adaptive decision feedback equalizer using a symbolic state space formulation

Anindya Sundar Dhar, Mrityunjoy Chakraborty, Suraiya Pervin, 2000, 2000 10th European Signal Processing Conference.

FPGA fabric conscious architecture design and automation of speed-area efficient Margolus neighborhood based cellular automata with variegated scan path insertion

A. Dhar, Ayan Palchaudhuri, Digvijay Anand, 2022, J. Parallel Distributed Comput..

Real-time fault-tolerance with hot-standby topology for conditional sum adder

Anindya Sundar Dhar, Atin Mukherjee, A. Dhar, 2015, Microelectron. Reliab..

Design of a Fault-Tolerant Conditional Sum Adder

Anindya Sundar Dhar, Atin Mukherjee, A. Dhar, 2012, VDAT.

Low latency pipelined CORDIC-like rotator architecture

Anindya Sundar Dhar, B. Lakshmi, A. Dhar, 2017 .

VLSI architecture for parallel radix-4 CORDIC

Anindya Sundar Dhar, Boppana Lakshmi, A. Dhar, 2013, Microprocess. Microsystems.

VLSI architecture for low latency radix-4 CORDIC

Anindya Sundar Dhar, Boppana Lakshmi, A. Dhar, 2011, Comput. Electr. Eng..

Low Latency VLSI Architecture for the Radix-4 CORDIC Algorithm

B. Lakshmi, A.S. Dhar, A. Dhar, 2008, 2008 IEEE Region 10 and the Third international Conference on Industrial and Information Systems.

High speed architectural implementation of CORDIC algorithm

B. Lakshmi, A.S. Dhar, A. Dhar, 2008, TENCON 2008 - 2008 IEEE Region 10 Conference.

A VLSI array architecture for realization of DFT, DHT, DCT and DST

Swapna Banerjee, Koushik Maharatna, Anindya Sundar Dhar, 2001, Signal Process..

Electron beam deposited lead‐lanthanum‐zirconate‐titanate thin films for silicon based device applications

Anindya Sundar Dhar, Arijit Sarkar, K. L. Chopra, 1996 .

Hall mobilities in B-doped strained Si1−xGex and Si1−x−yGexCy layers grown by ultrahigh vacuum chemical vapor deposition

S. Banerjee, G. Kar, S. Ray, 2000 .

Diffusion kinetics and evolution of self-assembled nickel germanide nanorings on germanised Si (100)

S. Ray, D. Panda, A. Dhar, 2015 .

FPGA implementation of discrete fractional Fourier transform

K C Ray, A S Dhar, M V N V Prasad, 2010, 2010 International Conference on Signal Processing and Communications (SPCOM).

Optical and dielectric properties of junctionlike CdS nanocomposites embedded in polymer matrix

S. Ray, S. Lahiri, T. Lavanya, 2007 .

FORMATION OF Y- AND T-JUNCTION Ge NANOWIRES BY VAPOR–LIQUID–SOLID MECHANISM

K. S. Coleman, R. Singha, S. Ray, 2007 .

Electroluminescence and charge storage characteristics of quantum confined germanium nanocrystals

Samaresh Das, R. Singha, S. Ray, 2011 .

Algorithm and Architecture Design of Adaptive Filters With Error Nonlinearities

Anindya Sundar Dhar, Vinay Chakravarthi Gogineni, Subrahmanyam Mula, 2017, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Algorithm and VLSI Architecture Design of Proportionate-Type LMS Adaptive Filters for Sparse System Identification

Anindya Sundar Dhar, Vinay Chakravarthi Gogineni, Subrahmanyam Mula, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Algorithm/Architecture Co-design of Proportionate-type LMS Adaptive Filters for Sparse System Identification pdf

Anindya Sundar Dhar, Vinay Chakravarthi Gogineni, Subrahmanyam Mula, 2017, ArXiv.

A Novel Nested Array for Real-Valued Sources Exploiting Array Motion

Anindya Sundar Dhar, Rajen Kumar Patra, A. Dhar, 2021, IEEE Signal Processing Letters.

Novel Moving Coprime Array Configurations for Real-Valued Sources

Rajen Kumar Patra, A. Dhar, 2022, IEEE Signal Processing Letters.

A Novel $k$-times Extended Coprime Array for DOA Estimation With Increased Degrees of Freedom

Rajen Kumar Patra, A. Dhar, 2022, IEEE Signal Processing Letters.

SIBAM—Sign Inclusive Broken Array Multiplier Design for Error Tolerant Applications

Anindya Sundar Dhar, Avishek Sinha Roy, A. Dhar, 2020, IEEE Transactions on Circuits and Systems II: Express Briefs.

Structural and electrical characteristics of the interfacial layer of ultrathin ZrO2 films on partially strain compensated Si0.69Ge0.3C0.01 layers

S. Maikap, G. Kar, Doh-Yeon Kim, 2003 .

On Fast and Exact Computation of Error Metrics in Approximate LSB Adders

Anindya Sundar Dhar, Avishek Sinha Roy, Rajdeep Biswas, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Pipelined VLSI Architecture using CORDIC for Transform Domain Equalizer

Ayan Banerjee, Anindya Sundar Dhar, A. Dhar, 2012, Journal of Signal Processing Systems.

High Throughput VLSI Architecture for Blackman Windowing in Real Time Spectral Analysis

Kailash Chandra Ray, Anindya Sundar Dhar, K. C. Ray, 2008, J. Comput..

Novel architecture for QAM modulator-demodulator and its generalization to multicarrier modulation

Ayan Banerjee, Anindya Sundar Dhar, A. Dhar, 2005, Microprocess. Microsystems.

An Array Architecture for Computing KLT Basis Vectors

Anindya Sundar Dhar, A. Dhar, 1992, The Fifth International Conference on VLSI Design.

An array architecture for fast computation of discrete Hartley transform

Anindya Sundar Dhar, A. Dhar, Swapna Banerjee, 1991 .

Adaptive digital phase modulation schemes using transition-initiated phase acceleration

Debasish Datta, Anindya Sundar Dhar, Rajarshi Mahapatra, 2008 .

Low-Delay Parallel Architecture for Fractal Image Compression

Indrajit Chakrabarti, Anindya Sundar Dhar, Mamata Panigrahy, 2015, Circuits, Systems, and Signal Processing.

Nonvolatile Memristive Switching Characteristics of TiO$_{\bm 2}$ Films Embedded With Nickel Nanocrystals

S. Ray, D. Panda, A. Dhar, 2012, IEEE Transactions on Nanotechnology.

Bonding, vibrational, and electrical characteristics of CdS nanostructures embedded in polyvinyl alcohol matrix

S. Ray, A. Chakraborty, A. Dhar, 2009 .

A Novel Paradigm of CORDIC-Based FFT Architecture Framed on the Optimality of High-Radix Computation

Ayan Banerjee, Anindya Sundar Dhar, A. Dhar, 2020, Circuits, Systems, and Signal Processing.