T. Mourier

发表

Advanced Metallizatisn Processes Integration as Manufacturing Worthy Solutions for > 10:1 Aspect Ratio Mid-Process TSV

T. Mourier, M. Gottardi, C. Ribiere, 2018, 2018 IEEE International Interconnect Technology Conference (IITC).

Low temperature MOCVD TiN barrier deposition for high aspect ratio TSVs : A solution for 3D integration

Chris E. Jones, A. Roule, S. Maitrejean, 2013 .

Electrografted Copper Seed Layer for High Aspect Ratio TSVs Interposer Metallization

L. Vandroux, T. Mourier, C. Ribiere, 2015 .

WSS and ZoneBOND temporary bonding techniques comparison for 80μm and 55μm functional interposer creation

C. Laviron, N. Sillon, E. Rolland, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.

Analysis of resistivity in nano-interconnect: full range (4.2-300 K) temperature characterization

G. Reimbold, L. Arnaud, T. Mourier, 2003, Proceedings of the IEEE 2003 International Interconnect Technology Conference (Cat. No.03TH8695).

Ultra Wide Micro Bumps Interconnection Matrix for High Energy Particle Detection: Process and Assembly

F. Allain, J. Charbonnier, M. Assous, 2019, 2019 IEEE 69th Electronic Components and Technology Conference (ECTC).

ECD seed copper layer for seed enhancement in advanced interconnects

P. Haumesser, G. Passemard, T. Ritzdorf, 2003 .

Copper post-electroplating anneal: evaluation of in-line vs. furnace anneal on layer properties

S. Maitrejean, P. Haumesser, T. Mourier, 2003 .

Copper-SilK integration in a 0.18 /spl mu/m double level metal interconnect

Yves Morand, Christian Arvet, T. Mourier, 1999, Proceedings of the IEEE 1999 International Interconnect Technology Conference (Cat. No.99EX247).

Porous low k pore sealing process study for 65 nm and below technologies

S. Maitrejean, R. Pantel, P. Haumesser, 2003, Proceedings of the IEEE 2003 International Interconnect Technology Conference (Cat. No.03TH8695).

PRIME process for deep UV and e-beam lithography

T. Mourier, M. Lerme, F. Vinet, 1990 .

Conformal isolation of high-aspect-ratio TSVs using a low-ź dielectric deposited by filament-assisted CVD

K. Ichiki, V. Jousseaume, T. Mourier, 2017 .

Correlation between electromigration and Cu-contact angle after de-wetting

T. Mourier, J. Dupuy, M. Cordeau, 2006 .

Evaluation of (hfac)Cu(MHY) for Cu CVD

P. Doppelt, T. Mourier, D. Mayer, 2002 .

Epoxy Wetting Flow and Adhesion Mechanism within a Small Gap and Small Pitch Copper Pillar Structure

Abdenacer Ait Mani, L. Vanel, C. Barentin, 2022, 2022 IEEE 72nd Electronic Components and Technology Conference (ECTC).

Three-dimensional hybrid bonding integration challenges and solutions toward multi-wafer stacking

F. Fournel, S. Chéramy, M. Assous, 2020, MRS Communications.

Through silicon via: From the CMOS imager sensor wafer level package to the 3D integration

T. Mourier, Xavier Gagnard, X. Gagnard, 2010 .

III-V multi-junction solar cell using metal wrap through contacts

F. Dimroth, T. Salvetat, E. Oliva, 2016 .

Resist processes for hybrid (electron-beam/deep ultraviolet) lithography

P. Paniez, T. Mourier, B. Mortini, 1998 .

In-situ X-ray μLaue diffraction study of copper through-silicon vias

Shay Reboh, Pierre Bleuet, Patrice Gergaud, 2016, Microelectronics and reliability.

Study of low temperature MOCVD deposition of TiN barrier layer for copper diffusion in high aspect ratio through silicon vias

Sylvain Maitrejean, Daniel Mathiot, Chris E. Jones, 2014 .

Analysis of High Aspect Ratio through Silicon via (TSV) Diffusion and Stress Impact Profile during 3D Advanced Integration

L. Vandroux, D. Rouchon, J. Barnes, 2014 .

Investigation of the interface stability in HfO 2 -metal electrodes

Sylvain Maitrejean, Bernard Guillaumot, T. Mourier, 2003 .

Quality and Reliability Assessment of Cu Pillar Bumps for Fine Pitch Applications

S. Moreau, D. Bouchu, T. Mourier, 2017, 2017 IEEE 67th Electronic Components and Technology Conference (ECTC).

ANR photoresist process optimization at 248 nm

James W. Thackeray, Christophe Pierrat, Francoise Vinet, 1990, Advanced Lithography.

Copper metallization for advanced interconnects: the electrochemical revolution

S. Maitrejean, P. Haumesser, G. Passemard, 2004, Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729).

Electrical and morphological characterization for high integrated silicon interposer and technology transfer from 200 mm to 300mm wafer

Myriam Assous, Kei Murayama, Kenichi Mori, 2013, 2013 IEEE 63rd Electronic Components and Technology Conference.