A. Almaini

发表

Testability and test compaction for decision diagram circuits

A. Bystrov, A. Almaini, 1999 .

Tabular techniques for Reed—Muller logic

P. Thomson, A. Almaini, D. Hanson, 1991 .

Optimization of Reed-Muller logic functions

J. Miller, P. Thomson, A. Almaini, 1993 .

Efficient polarity conversion for large Boolean functions

Lingli Wang, A. E. A. Almaini, A. Bystrov, 1999 .

Onset based optimization of multi-level mixed polarity Reed-Muller functions

Yinshui Xia, A. Almaini, Lunyao Wang, 2006 .

Exact minimization of dual Reed-Muller expansions

A. Almaini, Khalid Faraj, 2006 .

Adaptive PN Code Acquisition in Multi-Path Spread Spectrum Communications Using FPGA

A.E.A. Almaini, B. Wei, M.Y. Sharif, 2007, 2007 International Symposium on Signals, Circuits and Systems.

Evolutionary Algorithms and Theirs Use in the Design of Sequential Logic Circuits

Tatiana Kalganova, A. E. A. Almaini, B. Ali, 2004, Genetic Programming and Evolvable Machines.

State assignment for sequential circuits using multi-objective genetic algorithm

Neil Urquhart, A. E. A. Almaini, B. A. Al Jassani, 2011, IET Comput. Digit. Tech..

Extrinsic Evolution of Finite State Machine

Tatiana Kalganova, A. E. A. Almaini, A. Belgasem, 2002 .

Techniques for dual forms of Reed-Muller expansion conversion

A. E. A. Almaini, L. Wang, M. Yang, 2008, Integr..

State assignment of finite state machines using a genetic algorithm

A. E. A. Almaini, J. Miller, P. Thomson, 1995 .

Power optimization of finite state machine based on genetic algorithm

Xunwei Wu, Yinshui Xia, A. E. A. Almaini, 2003 .

Genetic algorithm based state assignment for power and area optimisation

Yinshui Xia, A E A Almaini, Yinshui Xia, 2002 .

Using genetic algorithms for the variable ordering of Reed-Muller binary decision diagrams

A.E.A. Almaini, N Zhuang, A. Almaini, 1995 .

Minimisation of multioutput Reed-Muller binary decision diagrams using hybrid genetic algorithm

A.E.A. Almaini, A. Almaini, N. Zhuang, 1995 .

Optimal polarity for dual Reed-Muller expressions

A. Almaini, Khalid Faraj, 2007 .

Multilevel logic simplification based on a containment recursive paradigm

Lun Yao Wang, A E A Almaini, A. Almaini, 2003 .

An Architecture Independent Packing Method for LUT-based Commercial FPGA

A. E. A. Almaini, Jinmei Lai, Meng Yang, 2014, J. Comput..

Indirect connection aware attraction for FPGA clustering (abstract only)

A. E. A. Almaini, Meng Yang, Jiarong Tong, 2013, FPGA '13.

FPGA placement optimization by two-step unified Genetic Algorithm and Simulated Annealing algorithm

Meng Yang, A. E. A. Almaini, Pengjun Wang, 2006 .

FPGA placement using genetic algorithm with simulated annealing

M. Yang, Pengjun Wang, A.E.A. Almaini, 2005, 2005 6th International Conference on ASIC.