Yongkui Zhang

发表

FinFET With Improved Subthreshold Swing and Drain Current Using 3-nm Ferroelectric Hf0.5Zr0.5O2

Tianchun Ye, H. Yin, Huilong Zhu, 2019, IEEE Electron Device Letters.

HfO2-based Ferroelectric Field-Effect-Transistor with Large Memory Window and Good Synaptic Behavior

Huilong Zhu, Junjie Li, J. Xiang, 2021 .

Vertical Sandwich Gate-All-Around Field-Effect Transistors With Self-Aligned High-k Metal Gates and Small Effective-Gate-Length Variation

Huilong Zhu, Yongkui Zhang, Xiaogen Yin, 2020, IEEE Electron Device Letters.

First Demonstration of Novel Vertical Gate-All-Around Field-Effect-Transistors Featured by Self-Aligned and Replaced High-κ Metal Gates.

Guilei Wang, Junfeng Li, Huilong Zhu, 2021, Nano letters.

Study of Isotropic and Si-Selective Quasi Atomic Layer Etching of Si1−xGex

Guilei Wang, Huilong Zhu, H. Radamson, 2020 .

Cryogenic Transport Characteristics of P-Type Gate-All-Around Silicon Nanowire MOSFETs

Tianchun Ye, Guilei Wang, Jun Luo, 2021, Nanomaterials.

A Novel Dry Selective Isotropic Atomic Layer Etching of SiGe for Manufacturing Vertical Nanowire Array with Diameter Less than 20 nm

Jianfeng Gao, A. Du, Guilei Wang, 2020, Materials.

Selective Digital Etching of Silicon-Germanium using Nitric and Hydrofluoric Acids.

A. Du, Guilei Wang, Huilong Zhu, 2020, ACS applied materials & interfaces.

Strained Si0.2Ge0.8/Ge multilayer Stacks Epitaxially Grown on a Low-/High-Temperature Ge Buffer Layer and Selective Wet-Etching of Germanium

Luyue Xie, A. Du, Guilei Wang, 2020, Nanomaterials.

A Study of Selectively Digital Etching Silicon-Germanium with Nitric and Hydrofluoric Acids

Technology of China, A. Du, Guilei Wang, 2020, 2003.03529.

Experimental Investigation of As Preamorphization Implant on Electrical Property of Ti-Based Silicide Contacts

Tianchun Ye, Yaodong Liu, Jianfeng Gao, 2021, IEEE Transactions on Electron Devices.

Ternary Logic Circuit Based on Negative Capacitance Field-Effect Transistors and Its Variation Immunity

Huilong Zhu, Zhenhua Wu, Yongkui Zhang, 2021, IEEE Transactions on Electron Devices.

Investigation of negative DIBL effect for ferroelectric-based FETs to improve MOSFETs and CMOS circuits

Qiang Huo, Huilong Zhu, Zhenhua Wu, 2021, Microelectron. J..

Growth and Selective Etch of Phosphorus-Doped Silicon/Silicon–Germanium Multilayers Structures for Vertical Transistors Application

Guilei Wang, Huilong Zhu, H. Radamson, 2020, Nanoscale Research Letters.

A Novel 3D NOR Flash With Single-Crystal Silicon Channel: Devices, Integration, and Architecture

Junfeng Li, Huilong Zhu, Wenwu Wang, 2022, IEEE Electron Device Letters.

Investigation of ferroelectric field-effect transistors using a replacement metal gate process

Huilong Zhu, Junjie Li, Gaobo Xu, 2020 .

Investigation of device-circuit for negative capacitance vertical nanowire FETs based on SPICE model

Huilong Zhu, Zhenhua Wu, Yongkui Zhang, 2020, Semiconductor Science and Technology.

The Investigation of Negative Capacitance Vertical Nanowire FETs Based on SPICE Model at Device-Circuit Level pdf

Qiang Huo, Huilong Zhu, Weixing Huang, 2020, ArXiv.

Simulations of VNW-FETs with Adjustable Spacer-Like Negative Capacitors Based on Experimental Data

Huilong Zhu, Zhenhua Wu, Jinjuan Xiang, 2019, ECS Journal of Solid State Science and Technology.

The evolution of MoS2 properties under oxygen plasma treatment and its application in MoS2 based devices

H. Yin, Huilong Zhu, Jiahan Yu, 2019, Journal of Materials Science: Materials in Electronics.

Two methods of tuning threshold voltage of bulk FinFETs with replacement high-k metal-gate stacks

Tianchun Ye, Jun Luo, Changliang Qin, 2017 .

Vertical nanowire/nanosheet FETs with a horizontal channel for threshold voltage modulation

Huilong Zhu, Xiaolei Wang, Yongkui Zhang, 2022, Journal of Semiconductors.

Investigation of Negative DIBL Effect and Miller Effect for Negative Capacitance Nanowire Field-Effect-Transistors

Huilong Zhu, Zhenhua Wu, Yongkui Zhang, 2020, IEEE Journal of the Electron Devices Society.

Study of HKMG Stack Interface Engineer Applicable to 22nm/16nm Finfet Mosfet

Ying Luo, Chao Zhao, Junfeng Li, 2014 .

The optimization of contact interface between metal/MoS2 FETs by oxygen plasma treatment

H. Yin, Jiahan Yu, Hanmin Tian, 2020, Journal of Materials Science: Materials in Electronics.

Process optimization of the Si0.7Ge0.3 Fin Formation for the STI first scheme

A. Du, Guilei Wang, Junfeng Li, 2019, Semiconductor Science and Technology.

The Effect of Doping on the Digital Etching of Silicon-Selective Silicon–Germanium Using Nitric Acids

Guilei Wang, Huilong Zhu, H. Radamson, 2021, Nanomaterials.

FOI FinFET with ultra-low parasitic resistance enabled by fully metallic source and drain formation on isolated bulk-fin

Tianchun Ye, Junjie Li, Chao Zhao, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

Investigation on Recrystallization Channel for Vertical C-Shaped-Channel Nanosheet FETs by Laser Annealing

A. Du, Guilei Wang, Jinbiao Liu, 2023, Nanomaterials.

Improving Driving Current with High-Efficiency Landing Pads Technique for Reduced Parasitic Resistance in Gate-All-Around Si Nanosheet Device

Guilei Wang, Lei Cao, Jinbiao Liu, 2022, ECS Journal of Solid State Science and Technology.

Vertical Sandwich GAA FETs With Self-Aligned High-k Metal Gate Made by Quasi Atomic Layer Etching Process

A. Du, H. Yin, Huilong Zhu, 2021, IEEE Transactions on Electron Devices.

Planar Bulk MOSFETs With Self-Aligned Pocket Well to Improve Short-Channel Effects and Enhance Device Performance

Tianchun Ye, Q. Liang, Hongyu Yu, 2015, IEEE Transactions on Electron Devices.

High-Quality Recrystallization of Amorphous Silicon on Si (100) Induced via Laser Annealing at the Nanoscale

A. Du, Guilei Wang, Jinbiao Liu, 2023, Nanomaterials.

Optimization of zero-level interlayer dielectric materials for gate-all-around silicon nanowire channel fabrication in a replacement metal gate process

Guilei Wang, H. Yin, Jiang Yan, 2021 .

On the SRAM with comb-shaped nano FETs advancing to 3 nm node and beyond

Huilong Zhu, Z. Kong, Zhenhua Wu, 2023, Microelectron. J..

Investigation on Ge0.8Si0.2-Selective Atomic Layer Wet-Etching of Ge for Vertical Gate-All-Around Nanodevice

A. Du, Guilei Wang, Huilong Zhu, 2021, Nanomaterials.

Ferroelectric Vertical Gate-All-Around Field-Effect-Transistors With High Speed, High Density, and Large Memory Window

Junfeng Li, Huilong Zhu, J. Xiang, 2022, IEEE Electron Device Letters.