H. Lakdawala

发表

A 0.8–2 GHz Fully-Integrated QPLL-Timed Direct-RF-Sampling Bandpass ADC in 0.13 m CMOS

D. Allstot, J. Rudell, Subhanshu Gupta, 2012 .

A QPLL-timed direct-RF sampling band-pass ΣΔ ADC with a 1.2 GHz tuning range in 0.13 µm CMOS

D. Allstot, J. Rudell, Subhanshu Gupta, 2011, 2011 IEEE Radio Frequency Integrated Circuits Symposium.

RF CMOS technology scaling in High-k/metal gate era for RF SoC (system-on-chip) applications

J. Rizk, K. Soumyanath, P. VanDerVoorn, 2010, 2010 International Electron Devices Meeting.

A 9.2–12GHz, 90nm digital fractional-N synthesizer with stochastic TDC calibration and −35/−41dBc integrated phase noise in the 5/2.5GHz bands

O. Degani, K. Soumyanath, S. Pellerano, 2010, 2010 Symposium on VLSI Circuits.

A 5-GHz 20-dBm Power Amplifier With Digitally Assisted AM-PM Correction in a 90-nm CMOS Process

R. Bishop, K. Soumyanath, Y. Palaskas, 2006, IEEE Journal of Solid-State Circuits.

A 2.4-GHz 20–40-MHz Channel WLAN Digital Outphasing Transmitter Utilizing a Delay-Based Wideband Phase Modulator in 32-nm CMOS

Yorgos Palaskas, Ashoke Ravi, Stefano Pellerano, 2012, IEEE Journal of Solid-State Circuits.

A 20dBm 2.4GHz digital outphasing transmitter for WLAN application in 32nm CMOS

Marian Verhelst, Yorgos Palaskas, Ashoke Ravi, 2012, 2012 IEEE International Solid-State Circuits Conference.

A Transformer-Combined 31.5 dBm Outphasing Power Amplifier in 45 nm LP CMOS With Dynamic Power Control for Back-Off Power Efficiency Enhancement

Yorgos Palaskas, Ashoke Ravi, L. Richard Carley, 2012, IEEE Journal of Solid-State Circuits.

A Class-E PA With Pulse-Width and Pulse-Position Modulation in 65 nm CMOS

O. Degani, K. Soumyanath, D.J. Allstot, 2009, IEEE Journal of Solid-State Circuits.

A 3.6GHz, 16mW ΣΔ DAC for a 802.11n / 802.16e transmitter with 30dB digital power control in 90nm CMOS

K. Soumyanath, H. Lakdawala, A. Ravi, 2008, ESSCIRC 2008 - 34th European Solid-State Circuits Conference.

Considerations for Cost-Efficient Calibration of Scaled ADCs

Marian Verhelst, Hasnain Lakdawala, Erkan Alpman, 2012 .

A 1.1V 50mW 2.5GS/s 7b Time-Interleaved C-2C SAR ADC in 45nm LP digital CMOS

L. Richard Carley, Krishnamurthy Soumyanath, Hasnain Lakdawala, 2009, 2009 IEEE International Solid-State Circuits Conference - Digest of Technical Papers.