Jiangmin Gu

发表

Ultra low-voltage low-power CMOS 4-2 and 5-2 compressors for fast arithmetic circuits

Chip-Hong Chang, Mingyan Zhang, Jiangmin Gu, 2004, IEEE Trans. Circuits Syst. I Regul. Pap..

A double-quadrature down-conversion mixer in 0.18 μm SiGe BiCMOS process

Kaixue Ma, Kiat Seng Yeo, Wei Meng Lim, 2011, 2011 International SoC Design Conference.

A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits

Chip-Hong Chang, Mingyan Zhang, Jiangmin Gu, 2005 .

LowPowerTransmitter Design forBAN

Jiangmin Gu, Kiat-Seng Yeo, 2007 .

Low Power Transmitter Design for BAN

Chirn Chye Boon, Manh Anh Do, Wei Meng Lim, 2007, 2007 IEEE Biomedical Circuits and Systems Conference.

Low voltage, low power (5:2) compressor cell for fast arithmetic circuits

Chip-Hong Chang, Jiangmin Gu, Chip-Hong Chang, 2003, 2003 IEEE International Conference on Acoustics, Speech, and Signal Processing, 2003. Proceedings. (ICASSP '03)..

An interconnect optimized floorplanning of a scalar product macrocell

Chip-Hong Chang, Kiat Seng Yeo, Jiangmin Gu, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

A CMOS power amplifier using power combination for 3.5GHz mobile WiMAX subscriber applications

Kaixue Ma, Kiat Seng Yeo, Jiangmin Gu, 2011, 2011 IEEE International Conference of Electron Devices and Solid-State Circuits.

A CMOS low-power receiving signal strength indicator using weak-inversion limiting amplifiers

Kaixue Ma, Kiat Seng Yeo, Zhigong Wang, 2011, 2011 IEEE International Conference of Electron Devices and Solid-State Circuits.

Low power millimeter wave active sige sub-harmonic up-conversion mixer with ultra low driving power

Kaixue Ma, Yang Lu, Kiat Seng Yeo, 2010, 2010 17th IEEE International Conference on Electronics, Circuits and Systems.

An area efficient 64-bit square root carry-select adder for low power applications

Chip-Hong Chang, Yajuan He, Jiangmin Gu, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Ultra low power active 60 GHz Bi-CMOS down-conversion mixer

Yang Lu, Kiat Seng Yeo, Wei Meng Lim, 2011, 2011 International SoC Design Conference.

A novel hybrid pass logic with static CMOS output drive full-adder cell

Chip-Hong Chang, Mingyan Zhang, Jiangmin Gu, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

A low-voltage fully-integrated CMOS power amplifier for mobile WiMAX subscriber station

Kiat Seng Yeo, Chirn Chye Boon, Manh Anh Do, 2009, 2009 International SoC Design Conference (ISOCC).

Ultra low voltage, low power 4-2 compressor for high speed multiplications

Chip-Hong Chang, Jiangmin Gu, 2003, Proceedings of the 2003 International Symposium on Circuits and Systems, 2003. ISCAS '03..

A DC to 4 GHz fully differential wideband digitally controlled Variable Gain Amplifier

Kaixue Ma, Hao Yu, Kiat Seng Yeo, 2010, 2010 Asia-Pacific Microwave Conference.

A novel covalent redundant binary Booth encoder

Chip-Hong Chang, Hossam A. H. Fahmy, Yajuan He, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Algorithm and architecture for a high density, low power scalar product macrocell

Chip-Hong Chang, Jiangmin Gu, Kiat Seng Yeo, 2004 .

A 10GHz 2.8dB gain passive mixer in 0.18um CMOS technology

Kiat Seng Yeo, Yang Liu, Chirn Chye Boon, 2011, 2011 IEEE International Conference of Electron Devices and Solid-State Circuits.

A novel low power low voltage full adder cell

Chip-Hong Chang, Mingyan Zhang, Jiangmin Gu, 2003, 3rd International Symposium on Image and Signal Processing and Analysis, 2003. ISPA 2003. Proceedings of the.

A fully integrated 0.18 µm SiGe BiCMOS low power 60 GHz receiver & transmitter for high data rate wireless communications

Kiat Seng Yeo, Wei Meng Lim, Jiangmin Gu, 2011, 2011 IEEE International Conference of Electron Devices and Solid-State Circuits.