V. Nguyen

Novel approach for nano-patterning magnetic tunnel junctions stacks at narrow pitch: A route towards high density STT-MRAM applications

B. Diény, L. Vila, R. Sousa, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

An electron holography study of perpendicular magnetic tunnel junctions nanostructured by deposition on pre-patterned conducting pillars.

B. Diény, L. Vila, R. Sousa, 2020, Nanoscale.

Challenges and targets of MRAM-enabled scaled spintronic logic circuits

G. Kar, S.Y. Lee, G. Micheli, 2022, 2209.01999.

Third type of domain wall in soft magnetic nanostrips

V. Nguyen, S. Pizzini, J. Vogel, 2015, Scientific Reports.

Elementary depinning processes of magnetic domain walls under fields and currents

P. Laczkowski, L. Vila, L. Vila, 2014, Scientific Reports.

BEOL compatible high retention perpendicular SOT-MRAM device for SRAM replacement and machine learning

G. Kar, D. Crotti, K. Garello, 2021, 2021 Symposium on VLSI Technology.

Perspectives and Challenges of Scaled Boolean Spintronic Circuits Based on Magnetic Tunnel Junction Transducers

G. Kar, G. Micheli, S. Cotofana, 2022, 2209.01999.

Selective operations of multi-pillar SOT-MRAM for high density and low power embedded memories

G. Kar, S. Rao, V. Nguyen, 2022, 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).