J. Kumagai

Reduction of Signal Voltage of DRAM Cell Induced by Discharge of Trapped Charges in Nano-Meter Thick Dual Dielectric Film (SiO2/Si3N4)

S. Sawada, K. Toita, J. Kumagai, 1990 .

Reduction of signal voltage of DRAM cell induced by discharge of trapped charges in nano-meter thick dual dielectric film (SiO/sub 2//Si/sub 3/N/sub 4/)

S. Sawada, K. Toita, J. Kumagai, 1990, 28th Annual Proceedings on Reliability Physics Symposium.

Stacked SiO2/Si3N4/SiO2dielectric layer for reliable memory capacitor

T. Watanabe, J. Kumagai, A. Menjoh, 1984, 1984 International Electron Devices Meeting.

High performance deep submicron buried channel PMOSFET using P/sup +/ poly-Si spacer induced self-aligned ultra shallow junctions

S. Sawada, H. Ishiuchi, F. Matsuoka, 1992, 1992 International Technical Digest on Electron Devices Meeting.