Shoichi Yamauchi

Implementation of double patterning process toward 22-nm node

Satoru Shimura, Tetsu Kawasaki, Hiroki Murakami, 2009, Lithography Asia.

Advanced self-aligned DP process development for 22-nm node and beyond

Kenichi Oyama, Masato Kushibiki, Arisa Hara, 2010, Advanced Lithography.

Novel approaches to controlling photo-resist CD in double patterning processes

Kenichi Oyama, Hiroki Murakami, Kazuhide Hasebe, 2010, Advanced Lithography.

200VTrenchFilling TypeSuperJunction MOSFET withOrthogonal GateStructure

Yoshitaka Noda, Shoichi Yamauchi, Yoshiyuki Hattori, 2007 .

Enabled Scaling Capability with Self-aligned Multiple patterning process

Hidetami Yaegashi, Arisa Hara, Shoichi Yamauchi, 2014 .

Electrical properties of super junction p-n diodes fabricated by trench filling

Shoichi Yamauchi, Y. Hattori, Hitoshi Yamaguchi, 2003, ISPSD '03. 2003 IEEE 15th International Symposium on Power Semiconductor Devices and ICs, 2003. Proceedings..