A. Tanabe

High performance CMOS for GHz communication IC

H. Tezuka, T. Suzaki, A. Tanabe, 1996, 1996 Symposium on VLSI Technology. Digest of Technical Papers.

2.8-Gb/s 176-mW byte-interleaved and 3.0-Gb/s 118-mW bit-interleaved 8:1 multiplexers with a 0.15-/spl mu/m CMOS technology

T. Suzaki, M. Kaneko, A. Tanabe, 1996 .

0.2 /spl mu/m nMOSFET using EB exposure for all lithography processes

Tetsuo Endoh, Fujio Masuoka, Hiroshi Sakuraba, 2000, 2000 22nd International Conference on Microelectronics. Proceedings (Cat. No.00TH8400).

A single chip 2.4 Gb/s CMOS optical receiver IC with low substrate crosstalk preamplifier

K. Yoshida, A. Tanabe, M. Soda, 1998, 1998 IEEE International Solid-State Circuits Conference. Digest of Technical Papers, ISSCC. First Edition (Cat. No.98CH36156).

A redundant multi-valued logic for 10 Gb/s CMOS demultiplexer IC

A. Tanabe, A. Furukawa, T. Mogami, 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

0.18- μm CMOS 10-Gb/s multiplexer/demultiplexer ICs using current mode logic with tolerance to threshold voltage fluctuation

Tetsuo Endoh, Fujio Masuoka, Hiroshi Sakuraba, 2001, IEEE J. Solid State Circuits.

A 40 Gb/s Multi-Data-Rate CMOS Transmitter and Receiver Chipset With SFI-5 Interface for Optical Transmission Systems

Y. Amamiya, Z. Yamazaki, H. Ikeda, 2009, IEEE Journal of Solid-State Circuits.

A 30-ns 64-Mb DRAM with built-in self-test and self-repair function

Hiroki Koike, Takaho Tanigawa, Hidenobu Miyamoto, 1992 .

RF performance boosting for 40nm-node CMOS device by low-k/Cu dual damascene contact

T. Fukai, T. Takeuchi, A. Tanabe, 2008, 2008 IEEE International Electron Devices Meeting.

Crosstalk Analysis Method of 3-D Solenoid On-chip Inductors for High-speed CMOS SoCs

Y. Amamiya, A. Tanabe, Y. Hayashi, 2008, 2008 International Interconnect Technology Conference.

High-frequency characteristics and its dependence on parasitic components in 0.1 /spl mu/m Si-MOSFETs

A. Tanabe, M. Togo, A. Furukawa, 1996, 1996 Symposium on VLSI Technology. Digest of Technical Papers.

Low-loss LSI Interconnects on Novel "Partially Low-k Plugged Si Substrate" (PLP-Sub) for RF/ubiquitous Applications

A. Tanabe, Y. Hayashi, K. Hijioka, 2006, 2006 International Interconnect Technology Conference.

A 30 ns 64 Mb DRAM with built-in self-test and repair function

N. Kasai, M. Takada, A. Tanabe, 1992, 1992 IEEE International Solid-State Circuits Conference Digest of Technical Papers.