Hsing-Hsiang Wang

发表

Heterogeneously integrated sub-40nm low-power epi-like Ge/Si monolithic 3D-IC with stacked SiGeC ambient light harvester

G. Huang, Meng-Fan Chang, Fu-Liang Yang, 2014, 2014 IEEE International Electron Devices Meeting.

Monolithic 3D chip integrated with 500ns NVM, 3ps logic circuits and SRAM

G. Huang, C. Hu, Meng-Fan Chang, 2013, 2013 IEEE International Electron Devices Meeting.

Charge-trap non-volatile memories fabricated by laser-enabled low-thermal budget processes

Ming C. Wu, C. Shen, J. Shieh, 2015 .

a-SiGeC thin film photovoltaic enabled self-power monolithic 3D IC under indoor illumination

W. Yeh, Meng-Fan Chang, C. Shen, 2016, 2016 International Symposium on VLSI Technology, Systems and Application (VLSI-TSA).

Enabling n-type polycrystalline Ge junctionless FinFET of low thermal budget by in situ doping of channel and visible pulsed laser annealing

T. C. Huang, P. Yu, W. Yeh, 2017 .

A sandwiched buffer layer enabling pulsed ultraviolet- and visible-laser annealings for direct fabricating poly-Si field-effect transistors on the polyimide

P. Yu, C. Shen, J. Shieh, 2017 .

Embedded Integration of Sb2Se3 Film by Low-Temperature Plasma-Assisted Chemical Vapor Reaction with Polycrystalline Si Transistor for High-Performance Flexible Visible-to-Near-Infrared Photodetector.

C. Shen, Y. Chueh, Wen-Hsien Huang, 2023, ACS nano.

Logic/memory hybrid 3D sequentially integrated circuit using low thermal budget laser process

Meng-Fan Chang, Chih-Chao Yang, Jia-Min Shieh, 2015, 2015 IEEE SOI-3D-Subthreshold Microelectronics Technology Unified Conference (S3S).

First demonstration of flexible poly-Si nano-FETs (W/Lg= 50/80 nm) on the polyimide utilizing multi-wavelength laser annealing assisted by laser-buffer layer

C. Shen, J. Shieh, Wen-Hsien Huang, 2022, IEEE Electron Devices Technology and Manufacturing Conference.

Junction-less poly-Ge FinFET and charge-trap NVM fabricated by laser-enabled low thermal budget processes

T. C. Huang, W. Yeh, C. Shen, 2016 .

Footprint-efficient and power-saving monolithic IoT 3D+ IC constructed by BEOL-compatible sub-10nm high aspect ratio (AR>7) single-grained Si FinFETs with record high Ion of 0.38 mA/μm and steep-swing of 65 mV/dec. and Ion/Ioff ratio of 8

Jia-Min Shieh, Chih-Chao Yang, Chang-Hong Shen, 2016, 2016 IEEE International Electron Devices Meeting (IEDM).

High Gamma Value 3D-Stackable HK/MG-Stacked Tri-Gate Nanowire Poly-Si FETs With Embedded Source/Drain and Back Gate Using Low Thermal Budget Green Nanosecond Laser Crystallization Technology

W. Yeh, C. Shen, J. Shieh, 2016, IEEE Electron Device Letters.

Vth adjustable self-aligned embedded source/drain Si/Ge nanowire FETs and dopant-free NVMs for 3D sequentially integrated circuit

Fu-Liang Yang, C. Shen, J. Shieh, 2014, 2014 IEEE International Electron Devices Meeting.

Sub-50nm monolithic 3D IC with low-power CMOS inverter and 6T SRAM

Chih-Chao Yang, Jia-Min Shieh, Tsung-Ta Wu, 2015, 2015 International Symposium on VLSI Technology, Systems and Applications.

Sequentially stacked 3DIC technology using green nanosecond laser crystallization and laser spike annealing technologies

C. Shen, J. Shieh, Chih-Chao Yang, 2015, 2015 IEEE 22nd International Symposium on the Physical and Failure Analysis of Integrated Circuits.

Record-high 121/62 μA/μm on-currents 3D stacked epi-like Si FETs with and without metal back gate

Jia-Min Shieh, Kuei-Shu Chang-Liao, Ci-Ling Pan, 2013, 2013 IEEE International Electron Devices Meeting.

Low-hole concentration polycrystalline germanium by CO2 laser annealing for the fabrication of an enhancement-mode nMOSFET

C. Shen, J. Shieh, Wen-Hsien Huang, 2018, Applied Physics Express.

Low-cost and TSV-free monolithic 3D-IC with heterogeneous integration of logic, memory and sensor analogy circuitry for Internet of Things

Meng-Fan Chang, Guo-Wei Huang, Ting-Jen Hsueh, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).