Raminderpal Singh

发表

FastCap: A Multipole Accelerated 3D Capacitance Extraction Program

Raminderpal Singh, 2002 .

FASTHENRY: A MultipoleAccelerated 3D Inductance Extraction Program

Raminderpal Singh, 2002 .

INTEGRATED SiGe AND Si DEVICE CAPABILITIES AND TRENDS FOR MULTI-GIGAHERTZ APPLICATIONS

S. Koester, B. Jagannathan, D. Greenberg, 2003 .

Forming Damped LRC Parasitic Circuits in Simultaneously Switched CMOS Output Buffers

Raminderpal Singh, Raminderpal Singh, 2002 .

Fullchip, threedimensional, shapesbased RLC extractionThis work was supported in part by the National Science Foundation under Grant CCR9734216 and by a gift from Cadence Design Systems.

Raminderpal Singh, Raminderpal Singh, 2002 .

Efficient Coupled Noise Estimation for OnChip Interconnects

Raminderpal Singh, Raminderpal Singh, 2002 .

Noiseaware Repeater Insertion and Wire Sizing for Onchip Interconnect Using Hierarchical MomentMatching

Raminderpal Singh, Raminderpal Singh, 2002 .

Silicon Germanium: Technology, Modeling, and Design

Raminderpal Singh, Modest M. Oprysko, David L. Harame, 2003 .

Double Precision Floating Point Arithmetic Unit Implementation- A Review

Rajiv Ranjan, Onkar Singh, Prabjot Kaur, 2015 .

A Study of Oscillator Jitter Due to Supply and Substrate Noise

Raminderpal Singh, 2002 .

Parasitic extraction: current state of the art and future trends

Chi-Yuan Lo, Mark Basel, Raminderpal Singh, 2001, ISCAS 2001. The 2001 IEEE International Symposium on Circuits and Systems (Cat. No.01CH37196).

Rule-based data mining for yield improvement in semiconductor manufacturing

Sholom M. Weiss, Fateh Tipu, Raminderpal Singh, 2010, Applied Intelligence.

Modeling and Analysis of Substrate Coupling in Integrated Circuits

Raminderpal Singh, Raminderpal Singh, 2002 .