D. Elliott

发表

Integrated circuit-based instrumentation for microchip capillary electrophoresis.

C. Backhouse, S. Martel, G. Kaigala, 2010, IET nanobiotechnology.

Miniaturized system for isotachophoresis assays.

G V Kaigala, C J Backhouse, J. Santiago, 2010, Lab on a chip.

Deterministic Design of Thin-Film Heaters for Precise Spatial Temperature Control in Lab-on-Chip Systems

David L. Sloan, C. Backhouse, D. Sameoto, 2016, Journal of Microelectromechanical Systems.

Robust thermal control for CMOS-based lab-on-chip systems

David L. Sloan, C. Backhouse, D. Glerum, 2015 .

An Empirical Evaluation of Semiconductor File Memory as a Disk Cache

B. Cockburn, D. Elliott, J. C. Koob, 2006 .

300 V integrated charge pump for lab on chip applications

David L. Sloan, C. Backhouse, D. Elliott, 2014, 14th IEEE International Conference on Nanotechnology.

High-Efficiency Charge Pumps for Low-Power On-Chip Applications

Duncan G. Elliott, Kambiz Moez, Jie Chen, 2018, IEEE Transactions on Circuits and Systems I: Regular Papers.

Computational RAM: Implementing Processors in Memory

Duncan G. Elliott, Michael Stumm, W. Martin Snelgrove, 1999, IEEE Des. Test Comput..

An investigation into crosstalk noise in DRAM structures

Bruce F. Cockburn, Duncan G. Elliott, Michael Redeker, 2002, Proceedings of the 2002 IEEE International Workshop on Memory Technology, Design and Testing (MTDT2002).

Using Stacked Bitlines and Hybrid ROM Cells to Form ROM and SRAM-ROM With Increased Storage Density

Bruce F. Cockburn, Duncan G. Elliott, Tyler L. Brandon, 2006, IEEE Transactions on Circuits and Systems I: Regular Papers.

High-Voltage CMOS Controller for Microfluidics

Duncan G. Elliott, Christopher J. Backhouse, Mohammad Behnam, 2007, IEEE Transactions on Biomedical Circuits and Systems.

Design and Characterization of a Multilevel DRAM

Bruce F. Cockburn, Duncan G. Elliott, Sue Ann Ung, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

An integrated CMOS high voltage supply for lab-on-a-chip systems.

G V Kaigala, M Behnam, M Khorasani, 2008, Lab on a chip.

A High-Performance and Energy-Efficient FIR Adaptive Filter Using Approximate Distributed Arithmetic Circuits

Duncan G. Elliott, Fabrizio Lombardi, Leibo Liu, 2019, IEEE Transactions on Circuits and Systems I: Regular Papers.

Computational Ram: A Memory-simd Hybrid And Its Application To Dsp

Duncan G. Elliott, Michael Stumm, William Martin Snelgrove, 1992, 1992 Proceedings of the IEEE Custom Integrated Circuits Conference.

Computational ram: a memory-simd hybrid

Duncan G. Elliott, Michael Stumm, M. Stumm, 1998 .

Real time 3D rendering patch processing using an embedded SIMD computer architecture

D.G. Elliott, J.S. Mrochuk, D. Elliott, 2005, Canadian Conference on Electrical and Computer Engineering, 2005..

An efficient functional test for the massively-parallel C/spl middot/RAM logic-enhanced memory architecture

Bruce F. Cockburn, Duncan G. Elliott, Xiaoling Sun, 2003, Proceedings 18th IEEE Symposium on Defect and Fault Tolerance in VLSI Systems.

Implementation of DSP-RAM: an architecture for parallel digital signal processing in memory

Bruce F. Cockburn, D. G. Elliott, B.S.-H. Kwan, 2001, Canadian Conference on Electrical and Computer Engineering 2001. Conference Proceedings (Cat. No.01TH8555).

A tightly coupled hybrid SIMD/SISD system

D.G. Elliott, N. Aklilu, C.A. Wickman, 1999, Engineering Solutions for the Next Millennium. 1999 IEEE Canadian Conference on Electrical and Computer Engineering (Cat. No.99TH8411).

Inexpensive, universal serial bus-powered and fully portable lab-on-a-chip-based capillary electrophoresis instrument.

G V Kaigala, M Behnam, C Bliss, 2009, IET nanobiotechnology.

Power Characterization of a Gbit/s FPGA Convolutional LDPC Decoder

Duncan G. Elliott, Vincent C. Gaudet, Tyler L. Brandon, 2012, 2012 IEEE Workshop on Signal Processing Systems.

Effects of Varying Message Precision in Digit-Online LDPC Decoders

Duncan G. Elliott, Vincent C. Gaudet, Philip A. Marshall, 2012, 2012 IEEE Workshop on Signal Processing Systems.

Deeply Pipelined Digit-Serial LDPC Decoding

Duncan G. Elliott, Vincent C. Gaudet, Philip A. Marshall, 2012, IEEE Transactions on Circuits and Systems I: Regular Papers.

Jointly Designed Architecture-Aware LDPC Convolutional Codes and High-Throughput Parallel Encoders/Decoders

Bruce F. Cockburn, Duncan G. Elliott, Witold A. Krzymien, 2010, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Compact 1.1-Gb/s Encoder and a Memory-Based 600-Mb/s Decoder for LDPC Convolutional Codes

Bruce F. Cockburn, Duncan G. Elliott, Vincent C. Gaudet, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

Efficient Implementation of Low-Density Parity-Check Convolutional Code Encoders With Built-In Termination

Bruce F. Cockburn, Duncan G. Elliott, Stephen Bates, 2008, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 600-Mb/s encoder and decoder for low-density parity-check convolutional codes

Bruce F. Cockburn, Duncan G. Elliott, Vincent C. Gaudet, 2008, 2008 IEEE International Symposium on Circuits and Systems.

A scalable LDPC decoder ASIC architecture with bit-serial message exchange

Bruce F. Cockburn, Duncan G. Elliott, Vincent C. Gaudet, 2008, Integr..

Design and Test of a 175-Mb/s, Rate-1/2 (128,3,6) Low-Density Parity-Check Convolutional Code Encoder and Decoder

S. Bates, B.F. Cockburn, T.L. Brandon, 2007, IEEE Journal of Solid-State Circuits.

Stochastic Circuit Design and Performance Evaluation of Vector Quantization for Different Error Measures

Jie Han, B. Cockburn, D. Elliott, 2016, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

A scalable and modular lab-on-a-chip genetic analysis instrument.

G V Kaigala, M Behnam, D G Elliott, 2010, The Analyst.

Aliasing and anti-aliasing in branch history table prediction

Duncan G. Elliott, Kristopher C. Breen, D. Elliott, 2003, CARN.