S. Lagrasta

14nm FDSOI upgraded device performance for ultra-low voltage operation

O. Weber, J. Mazurier, E. Josse, 2015, 2015 Symposium on VLSI Technology (VLSI Technology).

Study of selective chemical downstream plasma etching of silicon nitride and silicon oxide for advanced patterning applications

Gilles Cunge, Emilie Prévost, Côme De-Buttet, 2017, Advanced Lithography.

Modification of Ge-rich GeSbTe surface during the patterning process of phase-change memories

S. Barnola, E. Martinez, S. Lagrasta, 2020 .

Patterning of silicon nitride for CMOS gate spacer technology. II. Impact of subsilicon surface carbon implantation on epitaxial regrowth

F. Leverd, R. Blanc, C. Jenny, 2014 .

Improvement of etching and cleaning methods for integration of raised source and drain in FD-SOI technologies

D. Barge, P. Maury, S. Lagrasta, 2017 .

Interest of SiCO low k=4.5 spacer deposited at low temperature (400°C) in the perspective of 3D VLSI integration

C. Fenouillet-Béranger, R. Beneyton, J. Mazurier, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Truly Innovative 28nm FDSOI Technology for Automotive Micro-Controller Applications embedding 16MB Phase Change Memory

P. Mattavelli, R. Ranica, P. Boivin, 2018, 2018 IEEE International Electron Devices Meeting (IEDM).

14nm FDSOI technology for high speed and energy efficient applications

J. Mazurier, O. Faynot, A. Pofelski, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

Review of Some Critical Aspects of Ge and GeOI Substrates

Yves Morand, Simon Deleonibus, Laurent Clavelier, 2006 .