P. K. Rhee

An on-line reconfiguration algorithm of WSI processor arrays

J. H. Kim, P. K. Rhee, S.-K. Park, 1992, [Proceedings] 1992 IEEE International Symposium on Circuits and Systems.

Rotation-invariant recognition of character strings for Korean cadastral map digitizing

P. K. Rhee, J. S. Park, Y. G. Kang, 1995, Proceedings of 3rd International Conference on Document Analysis and Recognition.

Parallel execution of handwriting feature extraction for the reconfigurable parallel machine

J.-H. Yoo, P. K. Rhee, Y. S. Sim, 1993, 1993 Computer Architectures for Machine Perception.

A VLSI circuit extractor with a parallel algorithm

Kwang Sub Yoon, P. K. Rhee, Doo-Bok Lee, 1994, Proceedings of APCCAS'94 - 1994 Asia Pacific Conference on Circuits and Systems.

Reconfiguration algorithm of fault-tolerant two-dimensional VLSI arrays

J. H. Kim, P. K. Rhee, 1989, IEEE International Symposium on Circuits and Systems,.

A variable domain approach to reconfiguration of WSI processor arrays

P. K. Rhee, J. H. Kim, 1991, 1991 Proceedings, International Conference on Wafer Scale Integration.

An efficient fully parallel thinning algorithm

P. K. Rhee, N. H. Han, C. W. La, 1997, Proceedings of the Fourth International Conference on Document Analysis and Recognition.

A rule-based reconfiguration of WSI processor arrays

P. K. Rhee, J. H. Kim, 1992, [1992] Proceedings International Conference on Wafer Scale Integration.

New Performance Evaluation of Parallel Thinning Algorityms Based on PRAM and MPRAM Models

P. K. Rhee, C. W. La, 1998 .

Channel complexity analysis for reconfigurable VLSI/WSI processor arrays

P. K. Rhee, Jung Hwan Kim, 1990, [1990] Proceedings of the International Conference on Application Specific Array Processors.