César A. M. Marcon

发表

A VHDL based approach for fast and accurate energy consumption estimations

César A. M. Marcon, Sergio Johann Filho, Fabiano Hessel, 2007, 2007 IFIP International Conference on Very Large Scale Integration.

A reduced computational effort mode-level scheme for 3D-HEVC depth maps intra-frame prediction

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2018, J. Vis. Commun. Image Represent..

A QoS Scheduler for Real-Time Embedded Systems

César A. M. Marcon, Fabiano Hessel, David Matschulat, 2008, 9th International Symposium on Quality Electronic Design (isqed 2008).

High Level RTOS Scheduler Modeling for a Fast Design Validation

César A. M. Marcon, Fabiano Hessel, Tatiana Gadelha Serra dos Santos, 2007, IEEE Computer Society Annual Symposium on VLSI (ISVLSI '07).

A monitored NoC with runtime path adaptation

Fernando Gehm Moraes, Thais Webber, César A. M. Marcon, 2014, 2014 IEEE International Symposium on Circuits and Systems (ISCAS).

Real-time scalable hardware architecture for 3D-HEVC bipartition modes

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2017, Journal of Real-Time Image Processing.

Energy-aware light-weight DMM-1 patterns decoders with efficiently storage in 3D-HEVC

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2016, 2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI).

Fast 3D-Hevc Depth Maps Intra-Frame Prediction Using Data Mining

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2018, 2018 IEEE International Conference on Acoustics, Speech and Signal Processing (ICASSP).

Subutai: Distributed Synchronization Primitives in NoC Interfaces for Legacy Parallel-Applications

Altamiro Amadeu Susin, Martha Johanna Sepúlveda, César A. M. Marcon, 2018, 2018 55th ACM/ESDA/IEEE Design Automation Conference (DAC).

Employing a Timed Colored Petri Net to accomplish an accurate model for Network-on-Chip performance evaluation

César A. M. Marcon, Giovanni Cordeiro Barroso, Jarbas Silveira, 2014, Fifteenth International Symposium on Quality Electronic Design.

A Passive 915 MHz UHF RFID Tag

César A. M. Marcon, Fabiano Hessel, José Carlos S. Palma, 2008, 9th International Symposium on Quality Electronic Design (isqed 2008).

CAFES: A framework for intrachip application modeling and communication architecture design

Fernando Gehm Moraes, Altamiro Amadeu Susin, César A. M. Marcon, 2011, J. Parallel Distributed Comput..

Efficient traffic balancing for NoC routing latency minimization

Fernando Gehm Moraes, Thais Webber, César A. M. Marcon, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

MoNoC: A monitored network on chip with path adaptation mechanism

Fernando Gehm Moraes, Thais Webber, César A. M. Marcon, 2014, J. Syst. Archit..

Low-area scalable hardware architecture for DMM-1 encoder of 3D-HEVC video coding standard

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2017, 2017 30th Symposium on Integrated Circuits and Systems Design (SBCCI).

A non-intrusive and reconfigurable access control to secure NoCs

Fernando Gehm Moraes, Martha Johanna Sepúlveda, César A. M. Marcon, 2015, 2015 IEEE International Conference on Electronics, Circuits, and Systems (ICECS).

Efficient routing table minimization for fault-tolerant irregular Network-on-Chip

Avelino Francisco Zorzo, César A. M. Marcon, Jarbas Silveira, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Design Space Exploration Comparing Homogeneous and Heterogeneous Network-on-Chip Architectures

Luigi Carro, Altamiro Amadeu Susin, Flávio Rech Wagner, 2005, 2005 18th Symposium on Integrated Circuits and Systems Design.

Task mapping on NoC-based MPSoCs with faulty tiles: Evaluating the energy consumption and the application execution time

Alexandre M. Amory, Fernando Gehm Moraes, César A. M. Marcon, 2011, 2011 22nd IEEE International Symposium on Rapid System Prototyping.

Scheduling refinement in abstract RTOS models

César A. M. Marcon, Fabiano Hessel, Tatiana Gadelha Serra dos Santos, 2006, TECS.

Complexity reduction by modes reduction in RD-list for intra-frame prediction in 3D-HEVC depth maps

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2017, 2017 IEEE International Symposium on Circuits and Systems (ISCAS).

Optimized Fault-Tolerant Buffer Design for Network-on-Chip Applications

César A. M. Marcon, Daniel A. B. Tavares, Alan Cadore Pinheiro, 2019, 2019 IEEE 10th Latin American Symposium on Circuits & Systems (LASCAS).

Partitioning Algorithms Analysis for Heterogeneous NoC Based MPSoC

Thais Webber, César A. M. Marcon, Rubem Dutra Ribeiro Fagundes, 2012, 2012 Brazilian Symposium on Computing System Engineering.

A fault prediction module for a fault tolerant NoC operation

Thais Webber, César A. M. Marcon, Jarbas Silveira, 2015, Sixteenth International Symposium on Quality Electronic Design.

Analysis of routing algorithms generation for irregular NoC topologies

Paulo Cortez, César A. M. Marcon, Jarbas Silveira, 2017, 2017 18th IEEE Latin American Test Symposium (LATS).

A dynamic TDMA-based sleep scheduling to minimize WSN energy consumption

Fabian Vargas, Thais Webber, César A. M. Marcon, 2016, 2016 IEEE 13th International Conference on Networking, Sensing, and Control (ICNSC).

Energy and latency evaluation of NoC topologies

Luigi Carro, Altamiro Amadeu Susin, César A. M. Marcon, 2005, 2005 IEEE International Symposium on Circuits and Systems.

Partitioning and mapping on NoC-Based MPSoC: an energy consumption saving approach

César A. M. Marcon, Sergio Johann Filho, Fabiano Hessel, 2011, NoCArc '11.

Exploring NoC mapping strategies: an energy and timing aware technique

Fernando Gehm Moraes, Altamiro Amadeu Susin, César A. M. Marcon, 2005, Design, Automation and Test in Europe.

Tiny NoC: A 3D Mesh Topology with Router Channel Optimization for Area and Latency Minimization

Thais Webber, César A. M. Marcon, Rodrigo Cataldo, 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems.

Edge-aware depth motion estimation — A complexity reduction scheme for 3D-HEVC

Bruno Zatt, Marcelo Schiavon Porto, César A. M. Marcon, 2017, 2017 25th European Signal Processing Conference (EUSIPCO).

Evaluation of emerging TSV-enabled main memories on the PARSEC benchmark

Guilherme Korol, Debora Matos, César A. M. Marcon, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

DFPS: a fast pattern selector for depth modeling mode 1 in three-dimensional high-efficiency video coding standard

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2016, J. Electronic Imaging.

Exploiting Modbus Protocol in Wired and Wireless Multilevel Communication Architecture

Thais Webber, César A. M. Marcon, Giuliano B. M. Guarese, 2012, 2012 Brazilian Symposium on Computing System Engineering.

A flexible framework for modeling and simulation of multipurpose wireless networks

Ricardo M. Czekster, Thais Webber, César A. M. Marcon, 2013, 2013 International Symposium on Rapid System Prototyping (RSP).

The impact of routing arbitration mechanisms on 3D NoC latency

Thais Webber, César A. M. Marcon, Rodrigo Cataldo, 2014, 2014 21st IEEE International Conference on Electronics, Circuits and Systems (ICECS).

A path energy control technique for energy efficiency on wireless sensor networks

Fabian Vargas, Thais Webber, César A. M. Marcon, 2018, 2018 IEEE 9th Latin American Symposium on Circuits & Systems (LASCAS).

A security aware routing approach for NoC-based MPSoCs

Martha Johanna Sepúlveda, César A. M. Marcon, Georg Sigl, 2016, 2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI).

Latency reduction of fault-tolerant NoCs by employing multiple paths

César A. M. Marcon, Daniel A. B. Tavares, Paulo César Cortez, 2017, 2017 30th Symposium on Integrated Circuits and Systems Design (SBCCI).

SHC-SLX: A levelized compiled, event driven interpreted VLSI simulator

Luigi Carro, César A. M. Marcon, Altamiro A. Suzim, 1993, Microprocess. Microprogramming.

An implementation of a distributed fault-tolerant mechanism for 2D mesh NoCs

Alexandre M. Amory, Thais Webber, César A. M. Marcon, 2013, 2013 International Symposium on Rapid System Prototyping (RSP).

Low Area Reconfigurable Architecture for 3D-HEVC DMMs Decoder Targeting 1080p Videos

César A. M. Marcon, Gustavo Sanchez, Luciano Agostini, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Prototyping of embedded digital systems from SDL language: a case study

Alexandre M. Amory, Fernando Gehm Moraes, César A. M. Marcon, 2002, Seventh IEEE International High-Level Design Validation and Test Workshop, 2002..

Topological impact on latency and throughput: 2D versus 3D NoC comparison

Thais Webber, César A. M. Marcon, Edson I. Moreno, 2012, 2012 25th Symposium on Integrated Circuits and Systems Design (SBCCI).

DMNI: A specialized network interface for NoC-based MPSoCs

Fernando Gehm Moraes, César A. M. Marcon, Marcelo Ruaro, 2016, 2016 IEEE International Symposium on Circuits and Systems (ISCAS).

Mapping Embedded Systems onto NoCs - The Traffic Effect on Dynamic Energy Estimation

Fernando Gehm Moraes, Altamiro Amadeu Susin, César A. M. Marcon, 2005, 2005 18th Symposium on Integrated Circuits and Systems Design.

Arbitration and routing impact on NoC design

Fernando Gehm Moraes, César A. M. Marcon, Ney Laert Vilar Calazans, 2011, 2011 22nd IEEE International Symposium on Rapid System Prototyping.

Pre-mapping Algorithm for Heterogeneous MPSoCs

Thais Webber, César A. M. Marcon, Igor K. Pinotti, 2014, 2014 27th International Conference on VLSI Design and 2014 13th International Conference on Embedded Systems.

Models of computation for NoC mapping: Timing and energy saving awareness

Altamiro Amadeu Susin, Thais Webber, César A. M. Marcon, 2017, Microelectron. J..

Depth modeling modes complexity control system for the 3D-HEVC video encoder

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2017, 2017 25th European Signal Processing Conference (EUSIPCO).

Smart reconfiguration approach for fault-tolerant NoC based MPSoCs

Paulo Cortez, César A. M. Marcon, Jarbas Silveira, 2015, 2015 28th Symposium on Integrated Circuits and Systems Design (SBCCI).

Phoenix NoC: A distributed fault tolerant architecture

Alexandre M. Amory, Thais Webber, César A. M. Marcon, 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

3D-HEVC depth maps intra prediction complexity analysis

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Evaluating energy consumption of homogeneous MPSoCs using spare tiles

Alexandre M. Amory, Fernando Gehm Moraes, César A. M. Marcon, 2011, 2011 Design, Automation & Test in Europe.

Energy saving on DTN using trajectory inference model

Thais Webber, César A. M. Marcon, Gustavo Sanchez, 2018, SAC.

Abstract RTOS modeling for embedded systems

Altamiro Amadeu Susin, César A. M. Marcon, Fabiano Hessel, 2004, Proceedings. 15th IEEE International Workshop on Rapid System Prototyping, 2004..

Evaluation of multiple bit upset tolerant codes for NoCs buffering

César A. M. Marcon, Jarbas Silveira, Philippe de S. Magalhães, 2017, 2017 IEEE 8th Latin American Symposium on Circuits & Systems (LASCAS).

Time and energy efficient mapping of embedded applications onto NoCs

Luigi Carro, Altamiro Amadeu Susin, Flávio Rech Wagner, 2005, ASP-DAC.

Scenario preprocessing approach for the reconfiguration of fault-tolerant NoC-based MPSoCs

Paulo Cortez, César A. M. Marcon, Giovanni Cordeiro Barroso, 2016, Microprocess. Microsystems.

Modelos para o mapeamento de aplicações em infra-estruturas de comunicação intrachip

César A. M. Marcon, César Marcon, 2005 .

Least-Squares Approximation Surfaces for High Quality Intra-Frame Prediction in Future Video Standards

César A. M. Marcon, Gustavo Sanchez, Luciano Agostini, 2018, 2018 25th IEEE International Conference on Electronics, Circuits and Systems (ICECS).

DCDM-Intra: Dynamically Configurable 3D-HEVC Depth Maps Intra-Frame Prediction Algorithm

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2018, 2018 25th IEEE International Conference on Image Processing (ICIP).

Partitioning and dynamic mapping evaluation for energy consumption minimization on NoC-based MPSoC

César A. M. Marcon, Sergio Johann Filho, Fabiano Hessel, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

WSN Experiment and a Grid-Based Network Architecture Proposal

César A. M. Marcon, Leonardo A. Amaral, Fauzi de M. Shubeita, 2012, 2012 Brazilian Symposium on Computing System Engineering.

ER-EDF: A QoS Scheduler for Real-Time Embedded Systems

César A. M. Marcon, Fabiano Hessel, David Matschulat, 2007, 18th IEEE/IFIP International Workshop on Rapid System Prototyping (RSP '07).

Signal strength as support to mobility detection on failure detectors

César A. M. Marcon, Raul Ceretta Nunes, Antonio Rodrigo Delepiane de Vit, 2017, SAC.

High Efficient Architecture for 3D-HEVC DMM-1 Decoder Targeting 1080p Videos

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2018, 2018 IEEE International Symposium on Circuits and Systems (ISCAS).

A 915 MHz UHF low power RFID tag

César A. M. Marcon, Fabiano Hessel, José Carlos S. Palma, 2007, SBCCI '07.

Modeling the Traffic Effect for the Application Cores Mapping Problem onto NoCs

Fernando Gehm Moraes, Altamiro Amadeu Susin, César A. M. Marcon, 2005, VLSI-SoC.

A security-aware routing implementation for dynamic data protection in zone-based MPSoC

Martha Johanna Sepúlveda, César A. M. Marcon, Georg Sigl, 2017, 2017 30th Symposium on Integrated Circuits and Systems Design (SBCCI).

OcNoC: Efficient One-Cycle Router Implementation for 3D Mesh Network-on-Chip

Thais Webber, César A. M. Marcon, Rodrigo Cataldo, 2015, 2015 28th International Conference on VLSI Design.

Comparison of network-on-chip mapping algorithms targeting low energy consumption

Fernando Gehm Moraes, César A. M. Marcon, Ney Laert Vilar Calazans, 2008, IET Comput. Digit. Tech..

Differential Evolution on a GPGPU: The Influence of Parameters on Speedup and the Quality of Solutions

Omar Andrés Carmona Cortes, César A. M. Marcon, Andrew Rau-Chaplin, 2015, 2015 IEEE International Parallel and Distributed Processing Symposium Workshop.

Towards risk aware NoCs for data protection in MPSoCs

Martha Johanna Sepúlveda, César A. M. Marcon, Guy Gogniat, 2016, 2016 11th International Symposium on Reconfigurable Communication-centric Systems-on-Chip (ReCoSoC).

Models for embedded application mapping onto NoCs: timing analysis

Altamiro Amadeu Susin, César A. M. Marcon, Ney Laert Vilar Calazans, 2005, 16th IEEE International Workshop on Rapid System Prototyping (RSP'05).

An efficient, low-cost ECC approach for critical-application memories

Fabian Vargas, César A. M. Marcon, Jarbas Silveira, 2017, 2017 30th Symposium on Integrated Circuits and Systems Design (SBCCI).

Real-time simplified edge detector architecture for 3D-HEVC depth maps coding

Bruno Zatt, Marcelo Schiavon Porto, César A. M. Marcon, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

High-Level Estimation of Execution Time and Energy Consumption for Fast Homogeneous MPSoCs Prototyping

César A. M. Marcon, Sergio Johann Filho, Fabiano Hessel, 2008, 2008 The 19th IEEE/IFIP International Symposium on Rapid System Prototyping.

Task partitioning optimization algorithm for energy saving and load balance on NoC-based MPSoCs

Thais Webber, César A. M. Marcon, Rodrigo Cataldo, 2015, Sixteenth International Symposium on Quality Electronic Design.

Evaluation of Algorithms for Low Energy Mapping onto NoCs

Fernando Gehm Moraes, César A. M. Marcon, Ney Laert Vilar Calazans, 2007, 2007 IEEE International Symposium on Circuits and Systems.

Broadcast- and Power-Aware Wireless NoC for Barrier Synchronization in Parallel Computing

Sujay Deb, César A. M. Marcon, Jean-Philippe Diguet, 2018, 2018 31st IEEE International System-on-Chip Conference (SOCC).

Hardware-Oriented Wedgelet Evaluation Skip for DMM-1 in 3D-HEVC

César A. M. Marcon, Gustavo Sanchez, Luciano Volcan Agostini, 2018, 2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI).

Buffer depth and traffic influence on 3D NoCs performance

Thais Webber, César A. M. Marcon, Edson I. Moreno, 2012, 2012 23rd IEEE International Symposium on Rapid System Prototyping (RSP).

3D-HEVC DMM-1 Parallelism Exploration Targeting Multicore Systems

César A. M. Marcon, Leonel Sousa, Gustavo Sanchez, 2018, 2018 31st Symposium on Integrated Circuits and Systems Design (SBCCI).

Architectural exploration of Last-Level Caches targeting homogeneous multicore systems

Guilherme Korol, Debora Matos, César A. M. Marcon, 2016, 2016 29th Symposium on Integrated Circuits and Systems Design (SBCCI).

An Extensible Code for Correcting Multiple Cell Upset in Memory Arrays

Fabian Vargas, César A. M. Marcon, Jarbas Silveira, 2018, J. Electron. Test..

Lasio 3D NoC vertical links serialization: Evaluation of latency and buffer occupancy

Thais Webber, Matheus T. Moreira, César A. M. Marcon, 2013, 2013 26th Symposium on Integrated Circuits and Systems Design (SBCCI).

Software-based mechanism for Network-on-Chip performance increase

César A. M. Marcon, Augusto Santos, Marcelo Linck, 2016, 2016 IEEE International Conference on Electronics, Circuits and Systems (ICECS).

Preprocessing of Scenarios for Fast and Efficient Routing Reconfiguration in Fault-Tolerant NoCs

Paulo Cortez, César A. M. Marcon, Giovanni Cordeiro Barroso, 2015, 2015 23rd Euromicro International Conference on Parallel, Distributed, and Network-Based Processing.

RTOS Scheduler Implementation in Hardware and Software for Real Time Applications

César A. M. Marcon, Fabiano Hessel, Luciano Ost, 2006, Seventeenth IEEE International Workshop on Rapid System Prototyping (RSP'06).

LifeSenior - A Health Monitoring IoT System Based on Deep Learning Architecture

César A. M. Marcon, Fabiano Hessel, Maicon Diogo Much, 2021, HCI.

Analysis of VVC Intra Prediction Block Partitioning Structure

César A. M. Marcon, Gustavo Sanchez, Luciano Agostini, 2021, 2021 International Conference on Visual Communications and Image Processing (VCIP).

Chronos: An Abstract NoC-based Manycore with Preserved Temporal and Spatial Traffic Distribution

Fernando Gehm Moraes, César A. M. Marcon, Iaçanã I. Weber, 2021, 2021 IEEE 12th Latin America Symposium on Circuits and System (LASCAS).

A Trajectory Inference-based Technique for Energy Efficient Store-and-Forward Technology

César A. M. Marcon, Raul Ceretta Nunes, Antonio Rodrigo Delepiane de Vit, 2021, 2021 Wireless Days (WD).

Learning-Based Complexity Reduction Scheme for VVC Intra-Frame Prediction

César A. M. Marcon, Gustavo Sanchez, Luciano Agostini, 2021, 2021 International Conference on Visual Communications and Image Processing (VCIP).