Chixiao Chen

发表

An 8-bit 100-MS/s Digital-to-Skew Converter with 200-ps range for time-interleaved sampling

Fan Ye, Junyan Ren, Chixiao Chen, 2012, 2012 IEEE 55th International Midwest Symposium on Circuits and Systems (MWSCAS).

NNASIM: An Efficient Event-Driven Simulator for DNN Accelerators with Accurate Timing and Area Models

F. Yang, Chixiao Chen, Xiaoling Yi, 2022, 2022 IEEE International Symposium on Circuits and Systems (ISCAS).

2022 roadmap on neuromorphic devices and applications research in China

Zheng Yu Ren, Yuchao Yang, Pengcheng Zhou, 2022, Neuromorph. Comput. Eng..

Computing Utilization Enhancement for Chiplet-based Homogeneous Processing-in-Memory Deep Learning Processors

Mingyu Wang, Chixiao Chen, Haozhe Zhu, 2021, ACM Great Lakes Symposium on VLSI.

ALPINE: An Agile Processing-in-Memory Macro Compilation Framework

Chixiao Chen, Haozhe Zhu, Lihua Zhang, 2021, ACM Great Lakes Symposium on VLSI.

iFPNA: A Flexible and Efficient Deep Learning Processor in 28-nm CMOS Using a Domain-Specific Instruction Set and Reconfigurable Fabric

Xindi Liu, Huwan Peng, Chixiao Chen, 2019, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

iFPNA: A Flexible and Efficient Deep Neural Network Accelerator with a Programmable Data Flow Engine in 28nm CMOS

Hongwei Ding, C.-J. Richard Shi, Xindi Liu, 2018, ESSCIRC 2018 - IEEE 44th European Solid State Circuits Conference (ESSCIRC).

OCEAN: An on-chip incremental-learning enhanced processor with gated recurrent neural network accelerators

Hongwei Ding, Mingyu Wang, Rui Ma, 2017, ESSCIRC 2017 - 43rd IEEE European Solid State Circuits Conference.

OCEAN: An On-Chip Incremental-Learning Enhanced Artificial Neural Network Processor With Multiple Gated-Recurrent-Unit Accelerators

C.-J. Richard Shi, Huwan Peng, Yu Wang, 2018, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.

CA-SpaceNet: Counterfactual Analysis for 6D Pose Estimation in Space

Chixiao Chen, Shunli Wang, Dingkang Yang, 2022, 2022 IEEE/RSJ International Conference on Intelligent Robots and Systems (IROS).

TSA-Net: Tube Self-Attention Network for Action Quality Assessment

Chixiao Chen, Shunli Wang, Dingkang Yang, 2021, ACM Multimedia.

16.2 A 28nm 53.8TOPS/W 8b Sparse Transformer Accelerator with In-Memory Butterfly Zero Skipper for Unstructured-Pruned NN and CIM-Based Local-Attention-Reusable Engine

P. Li, Meilin Liu, Chixiao Chen, 2023, 2023 IEEE International Solid- State Circuits Conference (ISSCC).

A mixed sample-time error calibration technique in time-interleaved ADCs

Bei Yu, Junyan Ren, Fan Ye, 2013, IEICE Electron. Express.

ALPINE

Chixiao Chen, Bo Jiao, Haozhe Zhu, 2021, Proceedings of the 2021 on Great Lakes Symposium on VLSI.

Beyond convolutional neural networks computing: New trends on ISSCC 2023 machine learning chips

Chixiao Chen, Chen Mu, Jiapei Zheng, 2023, Journal of Semiconductors.

A 11.6μ W Computing-on-Memory-Boundary Keyword Spotting Processor with Joint MFCC-CNN Ternary Quantization

Chixiao Chen, Xiankui Xiong, Dong Xu, 2022, 2022 IEEE International Symposium on Circuits and Systems (ISCAS).

A 14-bit 200-MS/s time-interleaved ADC calibrated with LMS-FIR and interpolation filter

Fan Ye, Junyan Ren, Yu Zhu, 2011, 2011 IEEE International Conference of Electron Devices and Solid-State Circuits.

A 91.0-dB SFDR Single-Coarse Dual-Fine Pipelined-SAR ADC With Split-Based Background Calibration in 28-nm CMOS

Yongzhen Chen, Fan Ye, Junyan Ren, 2021, IEEE Transactions on Circuits and Systems I: Regular Papers.

A 6-b 600 MS/s SAR ADC with a new switching procedure of 2-b/stage and self-locking comparators*

Jun Xu, Ning Li, Fan Ye, 2015 .

A Scalable Die-to-Die Interconnect with Replay and Repair Schemes for 2.5D/3D Integration

Chixiao Chen, Hao Jiang, Jun Tao, 2023, 2023 IEEE International Symposium on Circuits and Systems (ISCAS).

Design Challenges of Intrachiplet and Interchiplet Interconnection

Jieming Yin, Yarui Peng, M. Palesi, 2022, IEEE design & test.

COMB-MCM: Computing-on-Memory-Boundary NN Processor with Bipolar Bitwise Sparsity Optimization for Scalable Multi-Chiplet-Module Edge Machine Learning

Meilin Liu, Hongzhong Zheng, Dimin Niu, 2022, 2022 IEEE International Solid- State Circuits Conference (ISSCC).

A $2.53 \mu \mathrm{W}/\text{channel}$ Event-Driven Neural Spike Sorting Processor with Sparsity-Aware Computing-In-Memory Macros

Chixiao Chen, Hao Jiang, Qi Liu, 2023, 2023 IEEE International Symposium on Circuits and Systems (ISCAS).

The Trend of Emerging Non-Volatile TCAM for Parallel Search and AI Applications

Qi Liu, Xumeng Zhang, Chixiao Chen, 2022, Chip.

A 9-Bit Resistor-Based Highly Digital Temperature Sensor With a SAR-Quantization Embedded Differential Low-Pass Filter in 65-nm CMOS With a 2.5- $\mu$ s Conversion Time

Chixiao Chen, C. R. Shi, Chang Liu, 2019, IEEE Sensors Journal.

TPNoC: An Efficient Topology Reconfigurable NoC Generator

Chixiao Chen, Xiaoling Yi, Jiangnan Yu, 2023, ACM Great Lakes Symposium on VLSI.

A 28 nm 81 Kb 59–95.3 TOPS/W 4T2R ReRAM Computing-in-Memory Accelerator With Voltage-to-Time-to-Digital Based Output

Chenyang Zhao, Xumeng Zhang, Chixiao Chen, 2022, IEEE Journal on Emerging and Selected Topics in Circuits and Systems.