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A. Aliyarukunju
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A 10nm high performance and low-power CMOS technology featuring 3rd generation FinFET transistors, Self-Aligned Quad Patterning, contact over active gate and cobalt local interconnects
C. Auth, V. Chikarmane, R. Heussner, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).