H. Gomez

A 10nm high performance and low-power CMOS technology featuring 3rd generation FinFET transistors, Self-Aligned Quad Patterning, contact over active gate and cobalt local interconnects

C. Auth, V. Chikarmane, R. Heussner, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

Comparison of Junctionless and Conventional Trigate Transistors With $L_{g}$ Down to 26 nm

M. Armstrong, R. Rios, K. Kuhn, 2011, IEEE Electron Device Letters.

Intel 4 CMOS Technology Featuring Advanced FinFET Transistors optimized for High Density and High-Performance Computing

Dilip Krishnan, N. Lindert, J. Sandford, 2022, 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).