C. Ward

A 10nm high performance and low-power CMOS technology featuring 3rd generation FinFET transistors, Self-Aligned Quad Patterning, contact over active gate and cobalt local interconnects

C. Auth, V. Chikarmane, R. Heussner, 2017, 2017 IEEE International Electron Devices Meeting (IEDM).

Demonstration of a reliable high-performance and yielding Air gap interconnect process

J. Bielefeld, S. King, H. Hiramatsu, 2010, 2010 IEEE International Interconnect Technology Conference.

Intel 4 CMOS Technology Featuring Advanced FinFET Transistors optimized for High Density and High-Performance Computing

Dilip Krishnan, N. Lindert, J. Sandford, 2022, 2022 IEEE Symposium on VLSI Technology and Circuits (VLSI Technology and Circuits).