Tsung-Hsien Lin

发表

An energy-efficient 1.5-Mbps wireless FSK transmitter with A ∑Δ-modulated phase rotator

Yao-Hong Liu, Tsung-Hsien Lin, 2007, ESSCIRC 2007 - 33rd European Solid-State Circuits Conference.

A 5GHz phase-locked loop using dynamic phase-error compensation technique for fast settling in 0.18-µm CMOS

Tsung-Hsien Lin, Wei-Hao Chiu, Tsung-Hsien Lin, 2009, 2009 Symposium on VLSI Circuits.

A fully integrated wireless CMOS microcantilever lab chip for detection of DNA from Hepatitis B virus (HBV)

Tsung-Hsien Lin, Ying-Zong Juang, Shey-Shi Lu, 2013 .

An Open-loop VCO-based ADC with Quasi-Chopping and Non-linearity Cancellation for Bio-Sensor Applications

Tsung-Hsien Lin, Chien-Liang Chen, 2022, 2022 IEEE Biomedical Circuits and Systems Conference (BioCAS).

A CMOS Cantilever-Based Label-Free DNA SoC With Improved Sensitivity for Hepatitis B Virus Detection

Che-Wei Huang, Tsung-Hsien Lin, Ying-Zong Juang, 2013, IEEE Transactions on Biomedical Circuits and Systems.

AN INTEGRATED MICROCANTILEVER-BASED WIRELESS DNA CHIP FOR HEPATITIS B VIRUS (HBV) DNA DETECTION

S. Lu, Hsiao-Ting Hsueh, Chih-Ting Lin, 2011 .

A 120-MHz active-RC filter with an agile frequency tuning scheme in 0.18-μm CMOS

Tsung-Hsien Lin, Wei-Hao Chiu, Yu-Chih Chen, 2008, 2008 IEEE International Symposium on VLSI Design, Automation and Test (VLSI-DAT).

A 1-V 5-MHz Bandwidth 68.3-dB SNDR Continuous-Time Delta-Sigma Modulator With a Feedback-Assisted Quantizer

Yung-Yu Lin, Tsung-Hsien Lin, Chan-Hsiang Weng, 2017, IEEE Transactions on Circuits and Systems I: Regular Papers.

A Synchronous 50% Duty-Cycle Clock Generator in 0.35-$\mu$m CMOS

Tsung-Hsien Lin, Yu-Hsiang Huang, Chao-Ching Chi, 2011, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Dynamic Current-Matching Charge Pump and Gated-Offset Linearization Technique for Delta-Sigma Fractional- $N$ PLLs

Tsung-Hsien Lin, Yao-Hong Liu, Ching-Lung Ti, 2009, IEEE Transactions on Circuits and Systems I: Regular Papers.

An Agile VCO Frequency Calibration Technique for a 10-GHz CMOS PLL

Tsung-Hsien Lin, Yu-Jen Lai, Tsung-Hsien Lin, 2007, IEEE Journal of Solid-State Circuits.

A 400-MHz/900-MHz/2.4-GHz multi-band FSK transmitter in 0.18-μm CMOS

Tsung-Hsien Lin, Wei-Hao Chiu, Tsung-Hsien Lin, 2009, 2009 IEEE Asian Solid-State Circuits Conference.

A Low-Noise Area-Efficient Chopped VCO-Based CTDSM for Sensor Applications in 40-nm CMOS

Chih-Chan Tu, Tsung-Hsien Lin, Yu-Kai Wang, 2017, IEEE Journal of Solid-State Circuits.

A 200-pJ/b MUX-Based RF Transmitter for Implantable Multichannel Neural Recording

Tsung-Hsien Lin, Yao-Hong Liu, Cheng-Lung Li, 2009, IEEE Transactions on Microwave Theory and Techniques.

A 2.4-GHz fractional-N PLL with a PFD/CP linearization and an improved CP circuit

Tsung-Hsien Lin, Yao-Hong Liu, Ching-Lung Ti, 2008, 2008 IEEE International Symposium on Circuits and Systems.

A 5-GHz direct-conversion CMOS transceiver utilizing automatic frequency control for the IEEE 802.11a wireless LAN standard

Ahmadreza Rofougaran, Li Lin, Keith A. Carter, 2003, IEEE J. Solid State Circuits.

A 70-490 MHz 50% Duty-Cycle Correction Circuit in 0.3-μm CMOS

Tsung-Hsien Lin, Chao-Ching Chi, Tsung-Hsien Lin, 2006, 2006 IEEE Asian Solid-State Circuits Conference.

A 0.06mm2 ± 50mV range −82dB THD chopper VCO-based sensor readout circuit in 40nm CMOS

Tsung-Hsien Lin, Chih-Chan Tu, Yu-Kai Wang, 2017, 2017 Symposium on VLSI Circuits.

A 5 GHz, 192.6 dBc/Hz/mW FOM, LC–VCO System With Amplitude Control Loop and LDO Voltage Regulator in 0.18 $\mu$m CMOS

Tsung-Hsien Lin, Ying-Che Tseng, Tsung-Hsien Lin, 2007, IEEE Microwave and Wireless Components Letters.

A 900 MHz, 2.5 mA CMOS frequency synthesizer with an automatic SC tuning loop

William J. Kaiser, Tsung-Hsien Lin, W. Kaiser, 2000, Proceedings of the IEEE 2000 Custom Integrated Circuits Conference (Cat. No.00CH37044).

A Wideband PLL-Based G/FSK Transmitter in 0.18 $\mu$m CMOS

Yao-Hong Liu, Tsung-Hsien Lin, Yao-Hong Liu, 2009, IEEE Journal of Solid-State Circuits.

A Dynamic Phase Error Compensation Technique for Fast-Locking Phase-Locked Loops

Tsung-Hsien Lin, Yu-Hsiang Huang, Wei-Hao Chiu, 2010, IEEE Journal of Solid-State Circuits.

A 4-GHz ΔΣ fractional-N frequency synthesizer with 2-dimensional quantization noise pushing and fractional spur elimination techniques

Tsung-Hsien Lin, Chun-Yu Lin, Chun-Yu Lin, 2016, 2016 IEEE Asian Solid-State Circuits Conference (A-SSCC).

Design of a 0.6-V, 429-MHz FSK Transceiver Using Q-Enhanced and Direct Power Transfer Techniques in 90-nm CMOS

Tsung-Hsien Lin, Chun-Yuan Chiu, Zhen-Cheng Zhang, 2020, IEEE Journal of Solid-State Circuits.

A 400-MHz super-regenerative receiver with a fast digital frequency calibration

Yao-Hong Liu, Tsung-Hsien Lin, Ching-Jen Tung, 2010, Proceedings of 2010 International Symposium on VLSI Design, Automation and Test.

A 80kS/s 36µW resistor-based temperature sensor using BGR-free SAR ADC with a unevenly-weighted resistor string in 0.18µm CMOS

Tsung-Hsien Lin, Chun-Kuan Wu, Wei-Shan Chan, 2011, 2011 Symposium on VLSI Circuits - Digest of Technical Papers.

A High Accuracy Constant-On-Time Buck Converter with Spur-Free On-Time Generator

Tsung-Hsien Lin, Tzu-Hsuan Yang, Mao-Ling Chiu, 2019, 2019 IEEE International Symposium on Circuits and Systems (ISCAS).

Intelligent Wireless EEG Measurement System With Electrical and Optogenetic Stimulation for Epileptic Seizure Detection and Suppression

Tsung-Hsien Lin, Chieh Tsou, Shuenn-Yuh Lee, 2021, IEEE Access.

Measurement and parameter characterization of pseudo-resistor based CCIA for biomedical applications

Chih-Chan Tu, Tsung-Hsien Lin, Tsung-Hsien Lin, 2014, 2014 IEEE International Symposium on Bioelectronics and Bioinformatics (IEEE ISBB 2014).

CMOS front end components for micropower RF wireless systems

Tsung-Hsien Lin, W. Kaiser, Tsung-Hsien Lin, 1998, Proceedings. 1998 International Symposium on Low Power Electronics and Design (IEEE Cat. No.98TH8379).