H. Lee

High-performance, cost-effective 2z nm two-deck cross-point memory integrated by self-align scheme for 128 Gb SCM

Taehoon Kim, Hyejung Choi, Myoungsub Kim, 2018, 2018 IEEE International Electron Devices Meeting (IEDM).

18.3 A 1.2V 64Gb 8-channel 256GB/s HBM DRAM with peripheral-base-die architecture and small-swing technique on heavy load interface

Kyung Whan Kim, Jae-Hwan Kim, Jun Hyun Chun, 2016, 2016 IEEE International Solid-State Circuits Conference (ISSCC).