Min Yoo

Alloying effect of Ni, Co, and Sb in SAC solder for improved drop performance of chip scale packages with Cu OSP pad finish

A. Syed, Tae Seong Kim, Y. Cho, 2006, 2006 8th Electronics Packaging Technology Conference.

Study of FCMBGA with low CTE core substrate

Nokibul Islam, Miguel Jimarez, Robert Darveaux, 2009, 2009 59th Electronic Components and Technology Conference.

Rheological characterization and full 3D mold flow simulation in multi-die stack CSP of chip array packaging

Choonheung Lee, M. W. Lee, Min Yoo, 2006, 56th Electronic Components and Technology Conference 2006.

Next generation fine pitch Cu Pillar technology — Enabling next generation silicon nodes

Curtis Zwenger, DaeByoung Kang, KyungRok Park, 2011, 2011 IEEE 61st Electronic Components and Technology Conference (ECTC).

Wafer-scale integration of transition metal dichalcogenide field-effect transistors using adhesion lithography

J. Kwon, M. Seol, Eun-Kyu Lee, 2022, Nature Electronics.

Study of interconnection process for fine pitch flip chip

Curtis Zwenger, Minjae Lee, Jaedong Kim, 2009, 2009 59th Electronic Components and Technology Conference.

Study on the Board Level Reliability Test of Package on Package (PoP) with 2nd Level Underfill

Jin-Young Kim, Tae-Kyung Hwang, Joon-Yeob Lee, 2007, 2007 Proceedings 57th Electronic Components and Technology Conference.