R. Andraka

An FPGA based processor yields a real time high fidelity radar environment simulator

R. Andraka, R. M. Phelps, 1998 .

Hybrid Floating Point Technique Yields 1 . 2 Gigasample Per Second 32 to 2048 point Floating Point FFT in a single FPGA

R. Andraka, 2006 .

A survey of CORDIC algorithms for FPGA based computers

Ray Andraka, R. Andraka, 1998, FPGA '98.

FPGAs make a radar signal processor on a chip a reality

A. Berkun, R. Andraka, R. Andraka, 1999, Conference Record of the Thirty-Third Asilomar Conference on Signals, Systems, and Computers (Cat. No.CH37020).

1 FIR Filter Fits in an FPGA using a Bit Serial Approach

R. Andraka, Raymond J. Andraka, 1993 .

A Low Complexity Method for Detecting Configuration Upset in SRAM Based FPGAs

R. Andraka, R. J. Andraka, J. L. Brady, 2003 .

Digital Radio High Performance Digital Down-Converters for FPGAs

Ray Andraka, R. Andraka, 2001 .