M. Ayinala

Parallel - pipelined radix-22 FFT architecture for real valued signals

K. Parhi, M. Ayinala, 2010, 2010 Conference Record of the Forty Fourth Asilomar Conference on Signals, Systems and Computers.

FFT Architectures for Real-Valued Signals Based on Radix-$2^{3}$ and Radix-$2^{4}$ Algorithms

Keshab K. Parhi, Manohar Ayinala, K. Parhi, 2013, IEEE Transactions on Circuits and Systems I: Regular Papers.

Low-Power Architectures for Signal Processing and Classification Systems

Manohar Ayinala, M. Ayinala, 2012 .

High-Speed Parallel Architectures for Linear Feedback Shift Registers

Keshab K. Parhi, Manohar Ayinala, K. Parhi, 2011, IEEE Transactions on Signal Processing.

Pipelined Parallel FFT Architectures via Folding Transformation

Keshab K. Parhi, Michael J. Brown, Manohar Ayinala, 2012, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Low-Complexity Welch Power Spectral Density Computation

Keshab K. Parhi, Manohar Ayinala, K. Parhi, 2014, IEEE Transactions on Circuits and Systems I: Regular Papers.

Low complexity algorithm for seizure prediction using Adaboost

Keshab K. Parhi, Manohar Ayinala, K. Parhi, 2012, 2012 Annual International Conference of the IEEE Engineering in Medicine and Biology Society.

An In-Place FFT Architecture for Real-Valued Signals

Keshab K. Parhi, Yingjie Lao, Manohar Ayinala, 2013, IEEE Transactions on Circuits and Systems II: Express Briefs.