C. Mackin

发表

Enabling High-Performance DNN Inference Accelerators Using Non-Volatile Analog Memory (Invited)

Pritish Narayanan, Geoffrey W. Burr, Stefano Ambrogio, 2020, 2020 4th IEEE Electron Devices Technology & Manufacturing Conference (EDTM).

Weight Programming in DNN Analog Hardware Accelerators in the Presence of NVM Variability

P. Narayanan, G. Burr, S. Ambrogio, 2019, Advanced Electronic Materials.

Optimised weight programming for analogue memory-based deep neural networks

M. Rasch, P. Narayanan, G. Burr, 2022, Nature Communications.

Fully on-chip MAC at 14nm enabled by accurate row-wise programming of PCM-based weights and parallel vector-transport in duration-format

P. Narayanan, I. Ahsan, G. Burr, 2021, 2021 Symposium on VLSI Technology.

Toward Software-Equivalent Accuracy on Transformer-Based Deep Neural Networks With Analog Memory Devices

Pritish Narayanan, Stefano Ambrogio, Hsinyu Tsai, 2021, Frontiers in Computational Neuroscience.

Reducing the Impact of Phase-Change Memory Conductance Drift on the Inference of large-scale Hardware Neural Networks

S. Ambrogio, A. Kumar, A. Chen, 2019, 2019 IEEE International Electron Devices Meeting (IEDM).

AI hardware acceleration with analog memory: Microarchitectures for low energy at high speed

Pritish Narayanan, Scott C. Lewis, Geoffrey W. Burr, 2019, IBM J. Res. Dev..

Inference of Long-Short Term Memory networks at software-equivalent accuracy using 2.5M analog Phase Change Memory devices

R. M. Shelby, P. Narayanan, H. Tsai, 2019, 2019 Symposium on VLSI Technology.

Impact of Phase-Change Memory Drift on Energy Efficiency and Accuracy of Analog Compute-in-Memory Deep Learning Inference (Invited)

M. Rasch, P. Narayanan, G. Burr, 2023, 2023 IEEE International Reliability Physics Symposium (IRPS).

Hardware-aware training for large-scale and diverse deep learning inference workloads using in-memory computing-based accelerators

M. Rasch, P. Narayanan, G. Burr, 2023, Nature communications.

Noise-Resilient DNN: Tolerating Noise in PCM-Based AI Accelerators via Noise-Aware Training

Moinuddin K. Qureshi, P. Narayanan, G. Burr, 2021, IEEE Transactions on Electron Devices.

An analog-AI chip for energy-efficient speech recognition and transcription

P. Narayanan, I. Ahsan, G. Burr, 2023, Nature.

Analog-memory-based 14nm Hardware Accelerator for Dense Deep Neural Networks including Transformers

M. Rasch, P. Narayanan, G. Burr, 2022, International Symposium on Circuits and Systems.

Mushroom-Type phase change memory with projection liner: An array-level demonstration of conductance drift and noise mitigation

S. Ambrogio, A. Sebastian, T. Yamashita, 2021, 2021 IEEE International Reliability Physics Symposium (IRPS).

Precision of bit slicing with in-memory computing based on analog phase-change memory crossbars

A. Sebastian, I. Boybat, S. Nandakumar, 2022, Neuromorph. Comput. Eng..

Analog acceleration of deep learning using phase-change memory

Pritish Narayanan, Geoffrey W. Burr, Stefano Ambrogio, 2020 .

Fully On-Chip MAC at 14 nm Enabled by Accurate Row-Wise Programming of PCM-Based Weights and Parallel Vector-Transport in Duration-Format

I. Ahsan, A. Friz, W. Haensch, 2021, IEEE Transactions on Electron Devices.