Sanghamitra Roy

发表

Rethinking Threshold Voltage Assignment in 3D Multicore Designs

Koushik Chakraborty, Sanghamitra Roy, 2010, 2010 23rd International Conference on VLSI Design.

An algorithm for converting floating-point computations to fixed-point in MATLAB based FPGA design

Sanghamitra Roy, Prithviraj Banerjee, P. Banerjee, 2004, Proceedings. 41st Design Automation Conference, 2004..

Challenges and Opportunities in Near-Threshold DNN Accelerators around Timing Errors

Sanghamitra Roy, Prabal Basu, Pramesh Pandey, 2020, Journal of Low Power Electronics and Applications.

EFFORT: Enhancing Energy Efficiency and Error Resilience of a Near-Threshold Tensor Processing Unit

Zhen Zhang, Sanghamitra Roy, Koushik Chakraborty, 2020, 2020 25th Asia and South Pacific Design Automation Conference (ASP-DAC).

UPTPU: Improving Energy Efficiency of a Tensor Processing Unit through Underutilization Based Power-Gating

Sanghamitra Roy, Koushik Chakraborty, Pramesh Pandey, 2021, 2021 58th ACM/IEEE Design Automation Conference (DAC).

GreenTPU: Improving Timing Error Resilience of a Near-Threshold Tensor Processing Unit

Sanghamitra Roy, Koushik Chakraborty, Prabal Basu, 2019, 2019 56th ACM/IEEE Design Automation Conference (DAC).

Maximising energy efficiency in 3D multicore systems: a formalised approach

Sanghamitra Roy, Koushik Chakraborty, Koushik Chakraborty, 2013 .

A global router on GPU architecture

Sanghamitra Roy, Koushik Chakraborty, Yiding Han, 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

Efficiently tolerating timing violations in pipelined microprocessors

Sanghamitra Roy, Koushik Chakraborty, Dean Michael Ancajas, 2013, 2013 50th ACM/EDAC/IEEE Design Automation Conference (DAC).

Predicting timing violations through instruction-level path sensitization analysis

Sanghamitra Roy, Koushik Chakraborty, Koushik Chakraborty, 2012, DAC Design Automation Conference 2012.

Runtime Detection of a Bandwidth Denial Attack from a Rogue Network-on-Chip

Sanghamitra Roy, Dean Michael Ancajas, Koushik Chakraborty, 2015, NOCS.

Fort-NoCs: Mitigating the threat of a compromised NoC

Sanghamitra Roy, Dean Michael Ancajas, Koushik Chakraborty, 2014, 2014 51st ACM/EDAC/IEEE Design Automation Conference (DAC).

Trident: Comprehensive Choke Error Mitigation in NTC Systems

Sanghamitra Roy, Koushik Chakraborty, Aatreyi Bal, 2018, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Trident: A comprehensive timing error resilient technique against choke points at NTC

Sanghamitra Roy, Koushik Chakraborty, Aatreyi Bal, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Revamping timing error resilience to tackle choke points at NTC systems

Sanghamitra Roy, Koushik Chakraborty, Aatreyi Bal, 2017, Design, Automation & Test in Europe Conference & Exhibition (DATE), 2017.

Security Measures Against a Rogue Network-on-Chip

Sanghamitra Roy, Koushik Chakraborty, Dean Michael Ancajas, 2017, Journal of Hardware and Systems Security.

Security Measures Against a Rogue Network-on-Chip

Koushik Chakraborty, Sanghamitra Roy, D. Ancajas, 2017, Journal of Hardware and Systems Security.

Split Latency Allocator: Process Variation-Aware Register Access Latency Boost in a Near-Threshold Graphics Processing Unit

Sanghamitra Roy, Koushik Chakraborty, Aatreyi Bal, 2017, J. Low Power Electron..

Microprocessor Power Supply Noise Aware Floorplanning Using a Circuit-Architectural Framework

Sanghamitra Roy, Koushik Chakraborty, Mandar Padmawar, 2011, Journal of Low Power Electronics.

2013 IEEE 31st International Conference on Computer Design, ICCD 2013, Asheville, NC, USA, October 6-9, 2013

Jason M. Allred, Sanghamitra Roy, Koushik Chakraborty, 2013, ICCD.

Wire Sizing

Charlie Chung-Ping Chen, Sanghamitra Roy, Sanghamitra Roy, 2008, Handbook of Algorithms for Physical Design Automation.

Using Adaptive Body Biasing for Robust Process Variation Aware DRAM Design

Sanghamitra Roy, Satyajit Desai, Sanghamitra Roy, 2013, Journal of Low Power Electronics.

Resilient Cache Design for Mobile Processors in the Near-Threshold Regime

Hu Chen, Sanghamitra Roy, Koushik Chakraborty, 2015, Journal of Low Power Electronics.

Designing for dark silicon: a methodological perspective on energy efficient systems

Jason M. Allred, Sanghamitra Roy, Koushik Chakraborty, 2012, ISLPED '12.

Securing Data Center Against Power Attacks

Chidhambaranathan Rajamanikkam, Sanghamitra Roy, Koushik Chakraborty, 2019, Journal of Hardware and Systems Security.

EFFORT: A Comprehensive Technique to Tackle Timing Violations and Improve Energy Efficiency of Near-Threshold Tensor Processing Units

Sanghamitra Roy, Koushik Chakraborty, Prabal Basu, 2021, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Implementing a Timing Error-Resilient and Energy-Efficient Near-Threshold Hardware Accelerator for Deep Neural Network Inference

N. D. Gundi, Koushik Chakraborty, Sanghamitra Roy, 2022, Journal of Low Power Electronics and Applications.

Exploring high throughput computing paradigm for global routing

Sanghamitra Roy, Koushik Chakraborty, Yiding Han, 2011, 2011 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Process variation aware DRAM design using block based adaptive body biasing algorithm

Sanghamitra Roy, Koushik Chakraborty, Satyajit Desai, 2012, Thirteenth International Symposium on Quality Electronic Design (ISQED).

Long term sustainability of differentially reliable systems in the dark silicon era

Jason M. Allred, Sanghamitra Roy, Koushik Chakraborty, 2013, 2013 IEEE 31st International Conference on Computer Design (ICCD).

Exploiting static and dynamic locality of timing errors in robust L1 cache design

Hu Chen, Sanghamitra Roy, Koushik Chakraborty, 2014, Fifteenth International Symposium on Quality Electronic Design.

Understanding Timing Error Characteristics from Overclocked Systolic Multiply–Accumulate Arrays in FPGAs

N. D. Gundi, Koushik Chakraborty, Sanghamitra Roy, 2024, Journal of Low Power Electronics and Applications.

GreenTPU: Predictive Design Paradigm for Improving Timing Error Resilience of a Near-Threshold Tensor Processing Unit

Sanghamitra Roy, Prabal Basu, Pramesh Pandey, 2020, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Synergistic timing speculation for multi-threaded programs

Hu Chen, J. Zhang, S. Garg, 2016, DAC.

ConvexSmooth: a simultaneous convex fitting and smoothing algorithm for convex optimization problems

Charlie Chung-Ping Chen, Sanghamitra Roy, Sanghamitra Roy, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).

Probabilistic Verification for Reliable Network-on-Chip System Design

Sanghamitra Roy, Arnd Hartmanns, Prabal Basu, 2019, FMICS.

Analysis of intermittent timing fault vulnerability

Sanghamitra Roy, Koushik Chakraborty, Yiding Han, 2012, Microelectron. Reliab..