H. Saito

发表

A Study on the Optimization of Asynchronous Circuits During RTL Conversion from Synchronous Circuits

Shogo Semba, H. Saito, 2019 .

Logic Optimization for Asynchronous SI Controllers using Transduction Method

Hiroshi Nakamura, Masahiro Fujita, Takashi Nanya, 2002, IWLS.

Adaptive Filtering Methods for RSSI Signals in a Device-Free Human Detection and Tracking System

Hiroshi Saito, Nattha Jindapetch, Apidet Booranawong, 2019, IEEE Systems Journal.

Design of asynchronous controllers with delay insensitive interface

Takashi Nanya, Alex Kondratyev, Hiroshi Saito, 2002, Proceedings of ASP-DAC/VLSI Design 2002. 7th Asia and South Pacific Design Automation Conference and 15h International Conference on VLSI Design.

Dependable real-time task execution scheme for a many-core platform

Kenji Kise, Tomohiro Yoneda, Masashi Imai, 2015, 2015 IEEE International Symposium on Defect and Fault Tolerance in VLSI and Nanotechnology Systems (DFTS).

Scheduling Methods for Asynchronous Circuits with Bundled-Data Implementations Based on the Approximation of Start Times

Takashi Nanya, Chris J. Myers, Tomohiro Yoneda, 2007, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

An ASIC Design Support Tool Set for Non-pipelined Asynchronous Circuits with Bundled-Data Implementation

Hiroshi Saito, Minoru Iizuka, Naohiro Hamada, 2013, IEICE Trans. Electron..

RSSI-Based Indoor Localization Using Multi-Lateration With Zone Selection and Virtual Position-Based Compensation Methods

Hiroshi Saito, Nattha Jindapetch, Apidet Booranawong, 2021, IEEE Access.

Enhancement of RSSI-Based Localization Using an Extended Weighted Centroid Method With Virtual Reference Node Information

Nattha Jindapetch, Kiattisak Sengchuai, Apidet Booranawong, 2020, Journal of Electrical Engineering & Technology.

A System for Detection and Tracking of Human Movements Using RSSI Signals

Hiroshi Saito, Nattha Jindapetch, Apidet Booranawong, 2018, IEEE Sensors Journal.

A Novel FPGA-Based Multi-Channel Multi-Interface Wireless Node: Implementation and Preliminary Test

Hiroshi Saito, Nattha Jindapetch, Apidet Booranawong, 2016 .

A Code Partitioning Tool for Simulink Models to Implement on FPGA-Based Network-on-Chip Architecture

Hiroshi Saito, Satoru Miyasono, Yosuke Moriai, 2014, 2014 IEEE 8th International Symposium on Embedded Multicore/Manycore SoCs.

Integration of behavioral synthesis and floorplanning for asynchronous circuits with bundled-data implementation

Hiroshi Saito, Naohiro Hamada, H. Saito, 2011, GLSVLSI '11.

A Behavioral Synthesis System for Asynchronous Circuits with Bundled-data Implementation

Takashi Nanya, Chris J. Myers, Tomohiro Yoneda, 2009, IPSJ Trans. Syst. LSI Des. Methodol..

Area-efficient Binary and Ternary CNN Accelerator using Random-forest-based Approximation

Hiroshi Saito, Yukihide Kohira, Yoichi Tomioka, 2021, 2021 Ninth International Symposium on Computing and Networking (CANDAR).

A CNN Approximation Method Based on Low-bit Quantization and Random Forests

Hiroshi Saito, Yukihide Kohira, Yoichi Tomioka, 2021, 2021 5th IEEE International Conference on Cybernetics (CYBCONF).

Adaptive repetitive controller for an active power filter in three ‐ phase four ‐ wire systems

Kongpol Areerak, Phonsit Santiprapan, Hiroshi Saito, 2020, IET Power Electronics.

Formal Verification Techniques for Digital Systems

MASAHIRO FUJITA, SATOSHI KOMATSU, HIROSHI SAITO, 1998 .

Field Modifiable Architecture and its Design Methodology: System Design Without Logic Synthesis

Masahiro Fujita, Satoshi Komatsu, Hiroshi Saito, 2002, International Workshop on Logic & Synthesis.

Engineering changes in field modifiable architectures

Masahiro Fujita, Satoshi Komatsu, Hiroshi Saito, 2003, First ACM and IEEE International Conference on Formal Methods and Models for Co-Design, 2003. MEMOCODE '03. Proceedings..

Equivalence checking of C programs by locally performing symbolic simulation on dependence graphs

Masahiro Fujita, Takeshi Matsumoto, Hiroshi Saito, 2006, 7th International Symposium on Quality Electronic Design (ISQED'06).