Qijing Huang

发表

AutoCkt: Deep Reinforcement Learning of Analog Circuit Designs

Ameer Haj-Ali, Borivoje Nikolic, Keertana Settaluri, 2020, 2020 Design, Automation & Test in Europe Conference & Exhibition (DATE).

AutoPhase: Juggling HLS Phase Orderings in Random Forests with Deep Reinforcement Learning pdf

John Wawrzynek, Ion Stoica, Krste Asanovic, 2020, MLSys.

CoDeNet: Algorithm-hardware Co-design for Deformable Convolution pdf

Kurt Keutzer, Yizhao Gao, John Wawrzynek, 2020, ArXiv.

The Effect of Compiler Optimizations on High-Level Synthesis for FPGAs

Jason Helge Anderson, Stephen Dean Brown, Qijing Huang, 2013, 2013 IEEE 21st Annual International Symposium on Field-Programmable Custom Computing Machines.

HAWQV3: Dyadic Neural Network Quantization pdf

Kurt Keutzer, Jiali Yu, Michael W. Mahoney, 2020, ArXiv.

FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud

Aditya Chopra, Jonathan Bachrach, Borivoje Nikolic, 2018, 2018 ACM/IEEE 45th Annual International Symposium on Computer Architecture (ISCA).

FireSim: FPGA-Accelerated Cycle-Exact Scale-Out System Simulation in the Public Cloud

Randy H. Katz, Borivoje Nikolic, Krste Asanovic, 2019, IEEE Micro.

From software to accelerators with LegUp high-level synthesis

Marcel Gort, Jason Helge Anderson, Stephen Dean Brown, 2013, 2013 International Conference on Compilers, Architecture and Synthesis for Embedded Systems (CASES).

The Effect of Compiler Optimizations on High-Level Synthesis-Generated Hardware

Jason Helge Anderson, Stephen Dean Brown, Qijing Huang, 2015, TRETS.

Synetgy: Algorithm-hardware Co-design for ConvNet Accelerators on Embedded FPGAs

Luciano Lavagno, Kurt Keutzer, Yifan Yang, 2018, FPGA.

Algorithm-hardware Co-design for Deformable Convolution pdf

Kurt Keutzer, Yizhao Gao, John Wawrzynek, 2020, ArXiv.

AutoPhase: Compiler Phase-Ordering for High Level Synthesis with Deep Reinforcement Learning pdf

John Wawrzynek, Ion Stoica, Krste Asanovic, 2019, ArXiv.

Integrating NVIDIA Deep Learning Accelerator (NVDLA) with RISC-V SoC on FireSim

Heechul Yun, Qijing Huang, Farzad Farshchi, 2019, 2019 2nd Workshop on Energy Efficient Machine Learning and Cognitive Computing for Embedded Applications (EMC2).

AutoPhase: Compiler Phase-Ordering for HLS with Deep Reinforcement Learning

John Wawrzynek, Ion Stoica, Krste Asanovic, 2019, 2019 IEEE 27th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).

FPGA Accelerated INDEL Realignment in the Cloud

David A. Patterson, Anthony D. Joseph, Krste Asanovic, 2019, 2019 IEEE International Symposium on High Performance Computer Architecture (HPCA).

Centrifuge: Evaluating full-system HLS-generated heterogenous-accelerator SoCs using FPGA-Acceleration

John Wawrzynek, Krste Asanovic, Guohao Dai, 2019, 2019 IEEE/ACM International Conference on Computer-Aided Design (ICCAD).

Synthesis of program binaries into FPGA accelerators with runtime dependence validation

John Wawrzynek, Qijing Huang, Shaoyi Cheng, 2017, 2017 International Conference on Field Programmable Technology (ICFPT).

ProTuner: Tuning Programs with Monte Carlo Tree Search pdf

John Wawrzynek, Ion Stoica, Hasan Genc, 2020, ArXiv.

BRU: Bandwidth Regulation Unit for Real-Time Multicore Processors

Heechul Yun, Qijing Huang, Farzad Farshchi, 2020, 2020 IEEE Real-Time and Embedded Technology and Applications Symposium (RTAS).

CoSA: Scheduling by Constrained Optimization for Spatial Accelerators

James Demmel, John Wawrzynek, Aravind Kalaiah, 2021, 2021 ACM/IEEE 48th Annual International Symposium on Computer Architecture (ISCA).

HAWQV3: Dyadic Neural Network Quantization

Kurt Keutzer, Michael W. Mahoney, Leyuan Wang, 2020, ICML.

HAO: Hardware-aware Neural Architecture Optimization for Efficient Inference

Kurt Keutzer, John Wawrzynek, Zhen Dong, 2021, 2021 IEEE 29th Annual International Symposium on Field-Programmable Custom Computing Machines (FCCM).