Tsu-Jae King

发表

Advanced gate technology for sub-0.25-μm CMOSFETs

Tsu-Jae King, 1998, Advanced Lithography.

Poly-SiGe MEMS actuators for adaptive optics

Tsu-Jae King, Richard S. Muller, Blake C.-Y. Lin, 2006, SPIE MOEMS-MEMS.

SRAM Read/Write Margin Enhancements Using FinFETs

Zheng Guo, Borivoje Nikolic, Sriram Balasubramanian, 2010, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Analytical performance models for RLC interconnects and application to clock optimization

Yu Cao, Dennis Sylvester, Xuejue Huang, 2002, 15th Annual IEEE International ASIC/SOC Conference.

FinFET scaling to 10 nm gate length

Bin Yu, Haihong Wang, Qi Xiang, 2002, Digest. International Electron Devices Meeting,.

MOSFET gate leakage modeling and selection guide for alternative gate dielectrics based on leakage considerations

Chenming Hu, Tsu-Jae King, Yee-Chia Yeo, 2003 .

Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design

Yu Cao, Dennis Sylvester, Chenming Hu, 2002, 15th Annual IEEE International ASIC/SOC Conference.

Extremely scaled ultra-thin-body and finfet CMOS devices

Yang-Kyu Choi, Jeffrey Bokor, Shiying Xiong, 2003 .

Advanced gate technology for sub-0.25 micron CMOSFETs

Tsu-Jae King, 1998 .

Loop-based interconnect modeling and optimization approach for multigigahertz clock network design

Yu Cao, Chenming Hu, Xuejue Huang, 2003 .

Taking silicon to the limit: challenges and opportunities

Tsu-Jae King, T. King, 2004, Proceedings. 7th International Conference on Solid-State and Integrated Circuits Technology, 2004..

FinFETs for nanoscale CMOS digital integrated circuits

Tsu-Jae King, T. King, 2005, ICCAD-2005. IEEE/ACM International Conference on Computer-Aided Design, 2005..

Moore's law lives on [CMOS transistors]

Jeffrey Bokor, Leland Chang, N. Lindert, 2003 .

Pyrometer modeling for rapid thermal processing

Mehrdad M. Moslehi, Krishna C. Saraswat, S. C. Wood, 1991, Other Conferences.

Integrated poly-SiGe nanomechanical resonators for wireless sensor nodes

Roger T. Howe, Tsu-Jae King, Emmanuel P. Quevy, 2004, SPIE Optics East.

Loop-based interconnect modeling and optimization approach for multi-GHz clock network design

Yu Cao, Xuejue Huang, Tsu-Jae King, 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

Sub-20 nm CMOS FinFET technologies

Chenming Hu, N. Lindert, Tsu-Jae King, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

RLC signal integrity analysis of high-speed global interconnects [CMOS]

Yu Cao, Dennis Sylvester, Chenming Hu, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

A capacitorless double gate DRAM technology for sub-100-nm embedded and stand-alone memory applications

Tsu-Jae King, Chenming Hu, C. Kuo, 2003 .

FinFET-based SRAM design

Zheng Guo, Borivoje Nikolic, Sriram Balasubramanian, 2005, ISLPED '05. Proceedings of the 2005 International Symposium on Low Power Electronics and Design, 2005..

Impact of on-chip interconnect frequency-dependent R(f)L(f) on digital and RF design

Yu Cao, Dennis Sylvester, Chenming Hu, 2005, IEEE Transactions on Very Large Scale Integration (VLSI) Systems.

Compact column design for a focused ion-beam lithography system

Ka-Ngo Leung, Tsu-Jae King, Q. Ji, 1999, Optics & Photonics.

Frequency-independent equivalent-circuit model for on-chip spiral inductors

Yu Cao, Chenming Hu, Xuejue Huang, 2003 .

Active matrix liquid crystal displays technology and applications : 10-11 February, 1997, San Jose, California

Tsu-Jae King, Tolis Voutsas, 1997 .

Polycrystalline silicon thin film transistor technology for flexible large-area electronics

Xiaofan Meng, Paul G. Carey, Patrick M. Smith, 2001, IS&T/SPIE Electronic Imaging.

CMOS front-end materials and process technology : symposium held April 22-24, 2003, San Francisco, California, U.S.A.

Bin Yu, Tsu-Jae King, Shuichi Saito, 2003 .

Moores law lives on - Ultra-thin body SOI and FinFET CMOS transistors look to continue Moores law for many years to come

Jeffrey Bokor, Jeffrey Bokor, Leland Chang, 2003 .

Frequency-independent equivalent circuit model for on-chip spiral inductors

Yu Cao, Xuejue Huang, Tsu-Jae King, 2002, Proceedings of the IEEE 2002 Custom Integrated Circuits Conference (Cat. No.02CH37285).

Effect of tensile capping layer on 3-D stress profiles in FinFET channels

T. Lauderdale, Tsu-Jae King, Kyoungsub Shin, 2005, 63rd Device Research Conference Digest, 2005. DRC '05..

Evidence of hole direct tunneling through ultrathin gate oxide using P/sup +/ poly-SiGe gate

Chenming Hu, Tsu-Jae King, Wen-Chin Lee, 1999 .

Effective density‐of‐states distributions for accurate modeling of polycrystalline‐silicon thin‐film transistors

Tsu-Jae King, M. Hack, I. Wu, 1994 .

An Ultra Low‐Temperature Fabricated Poly‐Si TFT with Stacked Composite ECR‐PECVD Gate Oxide

Yeh-Jiun Tung, Tsu-Jae King, Verle W. Aebi, 1998 .

Gate length scaling and threshold voltage control of double-gate MOSFETs

Jeffrey Bokor, Chenming Hu, Leland Chang, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Schottky Barrier Height Reduction and Drive Current Improvement in Metal Source/Drain MOSFET with Strained-Si Channel

Jeffrey Bokor, Atsushi Yagishita, Tsu-Jae King, 2003 .

30 nm ultra-thin-body SOI MOSFET with selectively deposited Ge raised S/D

Jeffrey Bokor, Pushkar Ranade, Chenming Hu, 2000, 58th DRC. Device Research Conference. Conference Digest (Cat. No.00TH8526).

Direct-tunneling gate leakage current in double-gate and ultrathin body MOSFETs

Chenming Hu, Yee-Chia Yeo, Leland Chang, 2002 .

Variable stress-induced leakage current and analysis of anomalous charge loss for flash memory application

Tsu-Jae King, T. King, R. Yamada, 2003, 2003 IEEE International Reliability Physics Symposium Proceedings, 2003. 41st Annual..

Scaling limits of hafnium–silicate films for gate-dielectric applications

Hideki Takeuchi, Tsu-Jae King, H. Takeuchi, 2003 .

POLY-SIGE HIGH FREQUENCY RESONATORS BASED ON LITHOGRAPHIC DEFINITION OF NANO-GAP LATERAL TRANSDUCERS

Roger T. Howe, Hideki Takeuchi, Tsu-Jae King, 2004 .

Investigation of Gate-Induced Drain Leakage (GIDL) Current in Thin Body Devices: Single-Gate Ultra-Thin Body, Symmetrical Double-Gate, and Asymmetrical Double-Gate MOSFETs

Jeffrey Bokor, Tsu-Jae King, Daewon Ha, 2003 .

Molybdenum Gate Electrode Technology For Deep Sub-Micron CMOS Generations

Pushkar Ranade, Chenming Hu, Yee-Chia Yeo, 2001 .

A low-temperature (

Krishna C. Saraswat, Tsu-Jae King, K. Saraswat, 1991, International Electron Devices Meeting 1991 [Technical Digest].

Direct tunneling leakage current and scalability of alternative gate dielectrics

Chenming Hu, Yee-Chia Yeo, Tsu-Jae King, 2002 .

Interconnect Issues for Integrated MEMS Technology

Roger T. Howe, Tsu-Jae King, Sunil A. Bhave, 2004 .

A capacitorless double-gate DRAM cell design for high density applications

Chenming Hu, Tsu-Jae King, C. Kuo, 2002, Digest. International Electron Devices Meeting,.

Electrical properties of heavily doped polycrystalline silicon-germanium films

Krishna C. Saraswat, Tsu-Jae King, James P. McVittie, 1994 .

FinFET Promise and Challenges

Tsu-Jae King, T. King, 2003 .

Low Resistance Silicon-Germanium Contact Technology for Modular Integration of MEMS with Electronics [J. Electrochem. Soc., 151, J21 (2004)]

Tsu-Jae King, Marie-Ange Eyoum, 2004 .

Quasi-planar NMOS FinFETs with sub-100 nm gate lengths

J. Bokor, Chenming Hu, Leland Chang, 2001, Device Research Conference. Conference Digest (Cat. No.01TH8561).

Dual stress capping layer enhancement study for hybrid orientation finFET CMOS technology

Chi On Chui, Tsu-Jae King, Kyoungsub Shin, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Patterning sub-30-nm MOSFET gate with i-line lithography

Chenming Hu, Tsu-Jae King, K. Asano, 2001 .

Impact of oxygen vacancies on high-/spl kappa/ gate stack engineering

Tsu-Jae King, Hiu Yung Wong, Daewon Ha, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Ultra Thin Body Silicon-On-Insulator (UTB SOI) MOSFET with Metal Gate Work-function Engineering for sub-70 nm Technology Node

Pushkar Ranade, Chenming Hu, Tsu-Jae King, 2002 .

Impact of crystal size and tunnel dielectric on semiconductor nanocrystal memory performance

Tsu-Jae King, Min She, T. King, 2003 .

Full/partial depletion effects in FinFETs

Tsu-Jae King, C.R. Cleavelin, P. Patruno, 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).

PROCESS OPTIMIZATION AND INTEGRATION OF HFO2 AND HF-SILICATES

Hideki Takeuchi, Tsu-Jae King, H. Takeuchi, 2004 .

Reliability study of CMOS FinFETs

J. Bokor, Tsu-Jae King, Daewon Ha, 2003, IEEE International Electron Devices Meeting 2003.

Circuit-Performance Implications for Double-Gate MOSFET Scaling below 25 nm

Borivoje Nikolic, Leland Chang, Tsu-Jae King, 2003 .

Metal-dielectric band alignment and its implications for metal gate complementary metal-oxide-semiconductor technology

Chenming Hu, Yee-Chia Yeo, Tsu-Jae King, 2002 .

Fin Sidewall Microroughness Measurement by AFM

Tsu-Jae King, Weize Xiong, Carolyn F. H. Gondran, 2004 .

Work Function Engineering of Molybdenum Gate Electrodes by Nitrogen Implantation

Pushkar Ranade, Chenming Hu, Hideki Takeuchi, 2001 .

FinFET-a quasi-planar double-gate MOSFET

J. Bokor, Chenming Hu, Xuejue Huang, 2001, 2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177).

Transistor Characteristics with Ta O Gate Dielectric

Donggun Park, Chenming Hu, Tsu-Jae King, 1998 .

Sub-50nm FinFET : PMOS

Vivek Subramanian, Jeffrey Bokor, Chenming Hu, 1999 .

Enhanced performance in sub-100 nm CMOSFETs using strained epitaxial silicon-germanium

Supika Mashiro, Chenming Hu, Yee-Chia Yeo, 2000, International Electron Devices Meeting 2000. Technical Digest. IEDM (Cat. No.00CH37138).

Observation of bulk HfO2 defects by spectroscopic ellipsometry

Hideki Takeuchi, Tsu-Jae King, Daewon Ha, 2004 .

Back-End-Of-Line Poly-Sige Disk Resonators

J. Bokor, Tsu-Jae King, R.T. Howe, 2006, 19th IEEE International Conference on Micro Electro Mechanical Systems.

Spacer FinFET: nanoscale double-gate CMOS technology for the terabit era

Chenming Hu, Tsu-Jae King, C. Hu, 2002 .

Performance of Deeply-Scaled, Power-Constrained Circuits

Borivoje Nikolic, Leland Chang, Tsu-Jae King, 2003 .

Ultra-thin body PMOSFETs with selectively deposited Ge source/drain

Chenming Hu, Tsu-Jae King, Daewon Ha, 2001, 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).

Moore's law lives on

Jeffrey Bokor, Chenming Hu, Leland Chang, 2003 .

POLY-SIGE: A HIGH-Q STRUCTURAL MATERIAL FOR INTEGRATED RF MEMS

Albert P. Pisano, Roger T. Howe, Tsu-Jae King, 2002 .

Impact of time dependent dielectric breakdown and stress-induced leakage current on the reliability of high dielectric constant (Ba,Sr)TiO/sub 3/ thin-film capacitors for Gbit-scale DRAMs

Donggun Park, Chenming Hu, Shintaro Yamamichi, 1999 .

Threshold voltage shift by quantum confinement in ultra-thin body device

Chenming Hu, Tsu-Jae King, Daewon Ha, 2001, Device Research Conference. Conference Digest (Cat. No.01TH8561).

Application of silicon-germanium in the fabrication of ultra-shallow extension junctions for sub-100 nm PMOSFETs

Vivek Subramanian, Pushkar Ranade, Tsu-Jae King, 2002 .

Tunable work function molybdenum gate technology for FDSOI-CMOS

Tsu-Jae King, A. Agarwal, Daewon Ha, 2002, Digest. International Electron Devices Meeting,.

Nanoscale ultrathin body PMOSFETs with raised selective germanium source/drain

Chenming Hu, Tsu-Jae King, Daewon Ha, 2001 .

Charge-trap memory device fabricated by oxidation of Si/sub 1-x/Ge/sub x/

Ya-Chin King, Chenming Hu, Tsu-Jae King, 2001 .

Optimization of Poly-SiGe Deposition Processes for Modular MEMS Integration

Roger T. Howe, Tsu-Jae King, Blake C.-Y. Lin, 2003 .

Deposition and Properties of Low‐Pressure Chemical‐Vapor Deposited Polycrystalline Silicon‐Germanium Films

Krishna C. Saraswat, Tsu-Jae King, K. Saraswat, 1994 .

Gate engineering for deep-submicron CMOS transistors

Chenming Hu, Tsu-Jae King, Wen-Chin Lee, 1998 .

The radial bulk annular resonator: towards a 50/spl Omega/ RF MEMS filter

Tsu-Jae King, B. Bircumshaw, R. Howe, 2003, TRANSDUCERS '03. 12th International Conference on Solid-State Sensors, Actuators and Microsystems. Digest of Technical Papers (Cat. No.03TH8664).

Quasi-planar FinFETs with selectively grown germanium raised source/drain

Jeffrey Bokor, Chenming Hu, Leland Chang, 2001, 2001 IEEE International SOI Conference. Proceedings (Cat. No.01CH37207).

Surface Charge Analysis of Ultrathin HfO2 , SiO2 , and Si3 N 4

Hideki Takeuchi, Tsu-Jae King, 2004 .

Extremely scaled silicon nano-CMOS devices

Jeffrey Bokor, Shiying Xiong, Pushkar Ranade, 2003, Proc. IEEE.

Dual-metal gate technology for deep-submicron CMOS transistors

Hongfa Luan, Dim-Lee Kwong, Pushkar Ranade, 2000, 2000 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.00CH37104).

60 nm planarized ultra-thin body solid phase epitaxy MOSFETs

Jeffrey Bokor, Chenming Hu, Tsu-Jae King, 2000, 58th DRC. Device Research Conference. Conference Digest (Cat. No.00TH8526).

FinFET process refinements for improved mobility and gate work function engineering

J. Bokor, Leland Chang, Tsu-Jae King, 2002, Digest. International Electron Devices Meeting,.

Effects of high-/spl kappa/ dielectrics on the workfunctions of metal and silicon gates

Chenming Hu, Yee-Chia Yeo, Tsu-Jae King, 2001, 2001 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.01 CH37184).

Two Silicon Nitride Technologies for Post

Hongfa Luan, Dim-Lee Kwong, Chenming Hu, 2001 .

Design and fabrication of 50-nm thin-body p-MOSFETs with a SiGe heterostructure channel

Vivek Subramanian, Jeffrey Bokor, Chenming Hu, 2002 .

A long-refresh dynamic/quasi-nonvolatile memory device with 2-nm tunneling oxide

Ya-Chin King, Chenming Hu, Tsu-Jae King, 1999 .

Spacer FinFET: nano-scale CMOS technology for the terabit era

Chenming Hu, Tsu-Jae King, C. Hu, 2001, 2001 International Semiconductor Device Research Symposium. Symposium Proceedings (Cat. No.01EX497).