A. Heittmann

发表

Stateful Three-Input Logic with Memristive Switches

S. Menzel, R. Waser, E. Linn, 2019, Scientific Reports.

Concept for diamond 3-D integrated UV sensor

R. Sauer, E. Kohn, G. Prinz, 2006 .

An Analog VLSI Pulsed Neural Network for Image Segmentation Using Adaptive Connection Weights

Daniel Matolin, Ulrich Ramacher, Jörg Schreiter, 2002, ICANN.

Nanosession: Neuromorphic Concepts

L. Chua, Ting Chang, S. Jo, 2013 .

A Hybrid Knowledge Processing System

Ulrich Rückert, Stefan Rüping, Arne Heittmann, 1998 .

Mixed Mode VLSI Implementation of a Neural Associative Memory

U. Rückert, A. Heittmann, 1999, Proceedings of the Seventh International Conference on Microelectronics for Neural, Fuzzy and Bio-Inspired Systems.

Variability of multilevel switching in scaled hybrid RS/CMOS nanoelectronic circuits: theory

T. Noll, A. Heittmann, 2013 .

Electrical Performance of 3D Circuits

Ulrich Ramacher, Arne Heittmann, U. Ramacher, 2008 .

Three-dimensional integration scheme with a thermal budget below 300 °C

Ulrich Ramacher, A. Heittmann, P. Benkart, 2007 .

Gabor-Like Image Filtering Using a Neural Microcircuit

René Schüffny, Christian Mayr, Arne Heittmann, 2007, IEEE Transactions on Neural Networks.

Pulse coupled neural networks with adaptive synapses for image segmentation

Daniel Matolin, Ulrich Ramacher, Jörg Schreiter, 2004, ARCS Workshops.

Scaling aspects of microjoints for 3D chip interconnects

U. Ramacher, E. Kohn, A. Heittmann, 2006, 2006 European Solid-State Device Research Conference.

Monte Carlo simulation of multilevel switching in hybrid CMOS/memristive nanoelectronic circuits

A. Heittmann, T. G. Noll, T. Noll, 2012, 2012 International Semiconductor Conference Dresden-Grenoble (ISCDG).

Simulating the Cortical Microcircuit Significantly Faster Than Real Time on the IBM INC-3000 Neural Supercomputer

C. E. Cox, M. Diesmann, T. Noll, 2022, Frontiers in Neuroscience.

Active Pixel Sensor Arrays in 90 / 65 nm CMOS-Technologies with vertically stacked photodiodes

C. Mayr, S. Henker, R. Schüffny, 2007 .

Analyses of a 1-layer neuromorphic network using memristive devices with non-continuous resistance levels

R. Waser, S. Menzel, A. Siemon, 2019, APL Materials.

Stateful Three-Input Logic with Memristive Switches

S. Menzel, R. Waser, E. Linn, 2019, Scientific Reports.

Theory and experimental verification of configurable computing with stochastic memristors

S. Menzel, R. Waser, K. Salama, 2021, Scientific Reports.

3D chip stack technology using through-chip interconnects

Ulrich Ramacher, Hans-Jörg Pfleiderer, Alexander Kaiser, 2005, IEEE Design & Test of Computers.

Simulation and implementation of an analog VLSI pulse-coupled neural network for image segmentation

R. Schuffny, U. Ramacher, J. Schreiter, 2004, The 2004 47th Midwest Symposium on Circuits and Systems, 2004. MWSCAS '04..

Cellular pulse-coupled neural network with adaptive weights for image segmentation and its VLSI implementation

Daniel Matolin, Ulrich Ramacher, Jörg Schreiter, 2004, IS&T/SPIE Electronic Imaging.

Analog implementation for networks of integrate-and-fire neurons with adaptive local connectivity

Ulrich Ramacher, Jörg Schreiter, René Schüffny, 2002, Proceedings of the 12th IEEE Workshop on Neural Networks for Signal Processing.

ANALOG IMPLEMENTATION FOR NETWORKS ADAPTIVE LOCAL CONNECTIVITY OF INTEGRATE-AND-FIRE NEURONS WITH

Ulrich Ramacher, Jörg Schreiter, Arne Heittmann, 2002 .

Architecture and optimization of associative memories used for the implementation of logic functions based on nanoelectronic 1S1R cells

Tobias G. Noll, Arne Heittmann, T. Noll, 2018, 2018 Design, Automation & Test in Europe Conference & Exhibition (DATE).

Mixing circuit based on neural associative memories and nanoelectronic 1S1R cells

Tobias G. Noll, Arne Heittmann, T. Noll, 2017, 2017 IEEE/ACM International Symposium on Nanoscale Architectures (NANOARCH).