W.S.V. Lee

Effect of wafer back grinding on the mechanical behavior of multilayered low-k for 3D-stack packaging applications

A. Kumar, V. Kripesh, Lu Shen, 2008, 2008 58th Electronic Components and Technology Conference.

Integration of High Aspect Ratio Tapered Silicon Via for Silicon Carrier Fabrication

V. Kripesh, N. Balasubramanian, O.K. Navas, 2009, IEEE Transactions on Advanced Packaging.

Cu via Exposure by Backgrinding for TSV Applications

V. Kripesh, N. Khan, W.S.V. Lee, 2007, 2007 9th Electronics Packaging Technology Conference.