N. Arnold

A novel trench DRAM cell with a vertical access transistor and buried strap (VERI BEST) for 4 Gb/16 Gb

U. Gruening, D. Casarotto, J. Alsmeier, 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

WSix refractory gate metal process for GaAs MESFETs

J. Willer, D. Ristow, N. Arnold, 1990 .

A highly cost efficient 8F/sup 2/ DRAM cell with a double gate vertical transistor device for 100 nm and beyond

W. Bergner, W. Mueller, J. Beintner, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

A highly manufacturable 110 nm DRAM technology with 8F/sup 2/ vertical transistor cell for 1Gb and beyond

W. Mueller, K. Varn, R. Jammy, 2002, 2002 Symposium on VLSI Technology. Digest of Technical Papers (Cat. No.01CH37303).