D.L. Kwong

发表

A manufacturable multiple gate oxynitride thickness technology for system on a chip

S.C. Song, B. Evans, C.H. Lee, 1999, International Electron Devices Meeting 1999. Technical Digest (Cat. No.99CH36318).

Narrow-band band-pass filters on silicon substrates at 30 GHz

A. Chin, K.T. Chan, D. Kwong, 2004, 2004 IEEE MTT-S International Microwave Symposium Digest (IEEE Cat. No.04CH37535).

Germanium pMOSFETs with Schottky-barrier germanide S/D, high-/spl kappa/ gate dielectric and metal gate

A. Chin, D. Kwong, A. Chin, 2005, IEEE Electron Device Letters.

Thermo-Optical Enhanced Silicon Wire Interleavers

M.B. Yu, Q. Fang, G. Lo, 2008, IEEE Photonics Technology Letters.

A novel program-erasable capacitor using high-/spl kappa/ AlN dielectric

A. Chin, C.H. Lai, M.F. Li, 2004, Conference Digest [Includes 'Late News Papers' volume] Device Research Conference, 2004. 62nd DRC..

Ultra-Narrow Silicon Nanowire Gate-All-Around CMOS Devices: Impact of Diameter, Channel-Orientation and Low Temperature on Device Performance

S.C. Rustagi, N. Balasubramanian, N. Singh, 2006, 2006 International Electron Devices Meeting.

Low-Cost and High-Speed SOI Waveguide-Based Silicide Schottky-Barrier MSM Photodetectors for Broadband Optical Communications

G. Lo, D. Kwong, D.L. Kwong, 2008, IEEE Photonics Technology Letters.

Successful transferring of active transistors, rf-passive components and high density interconnect from bulk si to organic substrates

E.B. Liao, N. Balasubramanian, L.H. Guo, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Si-Nanowire Based Gate-All-Around Nonvolatile SONOS Memory Cell

S.H.G. Teo, N. Balasubramanian, E. Gnani, 2008, IEEE Electron Device Letters.

Integration of RF-MEMS, passives and CMOS-IC on silicon substrate by low temperature wafer to wafer bonding technique

E.B. Liao, N. Balasubramanian, M. Tang, 2008, 2008 58th Electronic Components and Technology Conference.

Evaluation of Stresses in Thin Device Wafer using Piezoresistive Stress Sensor

A. Kumar, V. Kripesh, G. Meyer-Berg, 2008, 2008 10th Electronics Packaging Technology Conference.

MOS characteristics of ultrathin CVD HfAlO gate dielectrics

S.H. Bae, D. Kwong, R. Clark, 2003, IEEE Electron Device Letters.

Temperature Dependence of Carrier Transport of a Silicon Nanowire Schottky-Barrier Field-Effect Transistor

G. Liang, R. Eswar, S.J. Lee, 2008, IEEE Transactions on Nanotechnology.

Nickel Salicided Source/Drain Extensions for Performance Improvement in Ultrascaled (Sub 10 nm) Si-Nanowire Transistors

N. Singh, D. Kwong, D. Chan, 2009, IEEE Electron Device Letters.

Impact of Local Strain From Selective Epitaxial Germanium With Thin Si/SiGe Buffer on High-Performance p-i-n Photodetectors With a Low Thermal Budget

J. Wang, M.B. Yu, G. Lo, 2007, IEEE Electron Device Letters.

Nanowire FETs for low power CMOS applications featuring novel gate-all-around single metal FUSI gates with dual Φm and VT tune-ability

N. Singh, G. Lo, D. Kwong, 2008, 2008 IEEE International Electron Devices Meeting.

Low-Voltage High-Speed (18 GHz/1 V) Evanescent-Coupled Thin-Film-Ge Lateral PIN Photodetectors Integrated on Si Waveguide

J. Wang, M.B. Yu, G. Lo, 2008, IEEE Photonics Technology Letters.

Very low defects and high performance Ge-on-insulator p-MOSFETs with Al/sub 2/O/sub 3/ gate dielectrics

Albert Chin, W.J. Chen, C.H. Huang, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

CMOS Inverter Based on Gate-All-Around Silicon-Nanowire MOSFETs Fabricated Using Top-Down Approach

S.C. Rustagi, S.H.G. Teo, N. Balasubramanian, 2007, IEEE Electron Device Letters.

High-density MIM capacitors (/spl sim/85 nF/cm/sup 2/) on organic substrates

R. Kumar, E.B. Liao, N. Balasubramanian, 2005, IEEE Electron Device Letters.

Waveguided Ge/Si Avalanche Photodiode With Separate Vertical SEG-Ge Absorption, Lateral Si Charge, and Multiplication Configuration

S.C. Rustagi, Kah-Wee Ang, Shiyang Zhu, 2009, IEEE Electron Device Letters.

MOS characteristics of ultrathin NO-grown oxynitrides

J. Kim, L.K. Han, G.W. Yoon, 1994, IEEE Electron Device Letters.

Two-dimensional analytical modeling of threshold voltages of short-channel MOSFET's

D. Kwong, D.L. Kwong, D. R. Poole, 1984, IEEE Electron Device Letters.

Trap Layer Engineered Gate-All-Around Vertically Stacked Twin Si -Nanowire Nonvolatile Memory

S.H.G. Teo, N. Balasubramanian, M.B. Yu, 2007, 2007 IEEE International Electron Devices Meeting.

Integrated antennas on Si with over 100 GHz performance, fabricated using an optimized proton implantation process

C.Y. Chang, A. Chin, K.T. Chan, 2003, IEEE Microwave and Wireless Components Letters.

TDDB and polarity-dependent reliability of high-quality, ultrathin CVD HfO/sub 2/ gate stack with TaN gate electrode

D.L. Kwong, Sungjoo Lee, 2004, IEEE Electron Device Letters.

Germanium p- & n-MOSFETs fabricated with novel surface passivation (plasma-PH/sub 3/ and thin AlN) and TaN/HfO/sub 2/ gate stack

Fei Gao, Fei Gao, D. Kwong, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Ge MOS characteristics with CVD HfO/sub 2/ gate dielectrics and TaN gate electrode

D. Wristers, J. Liu, D. Antoniadis, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

Modeling Study of InSb Thin Film For Advanced III-V MOSFET Applications

G. Samudra, D. Kwong, G. Samudra, 2006, 2006 International Electron Devices Meeting.

Design High-Efficiency Si Nanopillar-Array-Textured Thin-Film Solar Cell

D. Kwong, H. Yu, P. Lo, 2010, IEEE Electron Device Letters.

Enhanced Vertical Light Extraction From Ultrathin Amorphous Si–Si$_{3}$ N$_{4}$ Multilayers With Photonic Crystal Patterns

M.B. Yu, D.L. Kwong, G.Q. Lo, 2009, IEEE Photonics Technology Letters.

Formation of high quality ultrathin oxide/nitride (ON) stacked capacitors by in situ multiple rapid thermal processing [DRAM cells]

J. Kim, L.K. Han, D. Kwong, 1995, IEEE Electron Device Letters.

Microelectromechanical Maltese-cross metamaterial with tunable terahertz anisotropy

T. Bourouina, X.H. Zhang, G. Lo, 2012, Nature Communications.

N-type Schottky barrier source/drain MOSFET using ytterbium silicide

A. Chin, D. Kwong, A. Chin, 2004, IEEE Electron Device Letters.

Simultaneous formation of silicide ohmic contacts and shallow p+-n junctions by ion-beam mixing and rapid thermal annealing

N. S. Alvi, D. Kwong, D.L. Kwong, 1985, IEEE Electron Device Letters.

CMOS compatible Gate-All-Around Vertical silicon-nanowire MOSFETs

S.H.G. Teo, B. Yang, K. Buddharaju, 2008, ESSDERC 2008 - 38th European Solid-State Device Research Conference.

Development of RF MEMS switch on flexible organic substrate with wafer transfer technology (WTT)

R. Kumar, L.H. Guo, A.B. Yu, 2006, 56th Electronic Components and Technology Conference 2006.

Schottky-barrier S/D MOSFETs with high-k gate dielectrics and metal-gate electrode

D.S.H. Chan, A. Chin, D. Kwong, 2004, IEEE Electron Device Letters.

Dual Metal Gates with Band-Edge Work Functions on Novel HfLaO High-K Gate Dielectric

Ming-Fu Li, Y.P. Feng, A. Chin, 2006, 2006 Symposium on VLSI Technology, 2006. Digest of Technical Papers..

Gate-all-around Si-nanowire CMOS inverter logic fabricated using top-down approach

S.C. Rustagi, S.H.G. Teo, N. Balasubramanian, 2007, ESSDERC 2007 - 37th European Solid State Device Research Conference.

Theoretical and experimental investigation of Si nanocrystal memory device with HfO/sub 2/ high-k tunneling dielectric

J.J. Lee, J. Liu, X. Wang, 2003, 2003 Symposium on VLSI Technology. Digest of Technical Papers (IEEE Cat. No.03CH37407).

A dual-strained CMOS structure through simultaneous formation of relaxed and compressive strained-SiGe-on-insulator

R. Kumar, N. Balasubramanian, B. Abidha, 2006, IEEE Electron Device Letters.

Ultra thin (<3 nm) high quality nitride/oxide stack gate dielectrics fabricated by in-situ rapid thermal processing

H.F. Luan, D.L. Kwong, B.Y. Kim, 1997, International Electron Devices Meeting. IEDM Technical Digest.

Work function tuning of fully silicided NiSi metal gates using a TiN capping layer

H.C. Wen, D. Kwong, H. Wen, 2004, IEEE Electron Device Letters.

Polycrystalline Si Nanowire SONOS Nonvolatile Memory Cell Fabricated on a Gate-All-Around (GAA) Channel Architecture

D.L. Kwong, N. Singh, G.Q. Lo, 2009, IEEE Electron Device Letters.

Performance breakthrough in 8 nm gate length Gate-All-Around nanowire transistors using metallic nanowire contacts

D.S.H. Chan, D.L. Kwong, N. Singh, 2008, 2008 Symposium on VLSI Technology.

Frequency dependent dynamic charge trapping in HfO/sub 2/ and threshold voltage instability in MOSFETs

D.S.H. Chan, X.P. Wang, D.L. Kwong, 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

Characterization and reliability of dual high-k gate dielectric stack (poly-Si-HfO2-SiO2) prepared by in situ RTCVD process for system-on-chip applications

C.H. Choi, D. Kwong, R. Clark, 2003, IEEE Electron Device Letters.

Oxynitride gate dielectrics for p/sup +/-polysilicon gate MOS devices

A.B. Joshi, D. Kwong, A. Joshi, 1993, IEEE Electron Device Letters.

Epitaxial strained germanium p-MOSFETs with HfO/sub 2/ gate dielectric and TaN gate electrode

W. Bai, D. Kwong, D. Antoniadis, 2003, IEEE International Electron Devices Meeting 2003.

Molybdenum gate HfO/sub 2/ CMOS FinFET technology

A. Agarwal, Daewon Ha, D. Kwong, 2004, IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004..

Silicon Nitride-Based Compact Double-Ring Resonator Comb Filter With Flat-Top Response

M.B. Yu, Q. Fang, D.L. Kwong, 2008, IEEE Photonics Technology Letters.