Kenji Takahashi

发表

Current Status of Research and Development for Three-Dimensional Chip Stack Technology

Manabu Bonkohara, Yoshihiro Tomita, Y. Yamaji, 2001 .

Development of less expensive process technologies for three-dimensional chip stacking with through-vias

Kazumasa Tanida, Mitsuo Umemoto, Toshihiro Yonezawa, 2004 .

Copper Via Filling Electrodeposition of High Aspect Ratio Through Chip Electrodes Used for the Three Dimensional Packaging

Seung Jin Oh, M. Tomisaka, Hitoshi Yonemura, 2003 .

Mechanical effects of copper through-vias in a 3D die-stacked module

Y. Yamaji, Naotaka Tanaka, Tadahiro Morifuji, 2002, 52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345).

Superfine flip-chip interconnection in 20/spl mu/m-pitch utilizing reliable microthin underfill technology for 3D stacked LSI

Mitsuo Umemoto, Yoshihiro Tomita, Tadahiro Morifuji, 2002, 52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345).

Au Bump Interconnection in 20 µm Pitch on 3D Chip Stacking Technology

Kazumasa Tanida, Mitsuo Umemoto, Yoshihiro Tomita, 2003 .

Development of wafer thinning and double-sided bumping technologies for the three-dimensional stacked LSI

M. Tomisaka, Hitoshi Yonemura, Kenji Takahashi, 2002, 52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345).

Circuits using uniform TFTs based on amorphous In‐Ga‐Zn‐O

Hideo Hosono, Masahiro Hirano, Kenji Nomura, 2007 .

Micro Cu Bump Interconnection on 3D Chip Stacking Technology

Kazumasa Tanida, Mitsuo Umemoto, Yoshihiro Tomita, 2004 .

Advanced packaging technologies on 3D stacked LSI utilizing the micro interconnections and the layered microthin encapsulation

Yoshihiro Tomita, Yoshihiko Nemoto, Tadahiro Morifuji, 2001, 2001 Proceedings. 51st Electronic Components and Technology Conference (Cat. No.01CH37220).

Electroplating Cu fillings for through-vias for three-dimensional chip stacking

M. Tomisaka, Hitoshi Yonemura, Jian Jun Sun, 2002, 52nd Electronic Components and Technology Conference 2002. (Cat. No.02CH37345).

Ultra-high-density 3D chip stacking technology

Kazumasa Tanida, Mitsuo Umemoto, Yoshihiro Tomita, 2003, 53rd Electronic Components and Technology Conference, 2003. Proceedings..