Lars-Ake Ragnarsson

发表

Highly scalable bulk FinFET Devices with Multi-VT options by conductive metal gate stack tuning for the 10-nm node and beyond

B. Parvais, A. Brand, N. Horiguchi, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

Electrical properties of high-κ gate dielectrics: Challenges, current issues, and possible solutions

Guido Groeseneken, Luigi Pantisano, Tom Schram, 2006 .

Fast Ramped Voltage Characterization of Single Trap Bias and Temperature Impact on Time-Dependent \(V_{\rm TH}\) Variability

Naoto Horiguchi, Aaron Thean, Robin Degraeve, 2014, IEEE Transactions on Electron Devices.

Superior Reliability of Junctionless pFinFETs by Reduced Oxide Electric Field

Aaron Thean, Philippe Matagne, Anda Mocuta, 2014, IEEE Electron Device Letters.

Molecular-beam-deposited yttrium-oxide dielectrics in aluminum-gated metal–oxide–semiconductor field-effect transistors: Effective electron mobility

Eduard A. Cartier, Supratik Guha, Nestor A. Bojarczuk, 2001 .

Demonstration of sufficient BTI reliability for a 14-nm finFET 1.8 V I/O technology featuring a thick ALD SiO2 IL and Ge p-channel

Naoto Horiguchi, Dimitri Linten, Geert Hellings, 2017, 2017 IEEE International Reliability Physics Symposium (IRPS).

Anomalous positive-bias temperature instability of high-κ/metal gate devices with Dy2O3 capping

Guido Groeseneken, Luigi Pantisano, Marc Aoulaiche, 2008 .

15nm-WFIN high-performance low-defectivity strained-germanium pFinFETs with low temperature STI-last process

A. Brand, P. Eyben, L. Witters, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

Bias-temperature instability of Si and Si(Ge)-channel sub-1nm EOT p-MOS devices: Challenges and solutions

B. Kaczer, J. Mitard, G. Groeseneken, 2013, Proceedings of the 20th IEEE International Symposium on the Physical and Failure Analysis of Integrated Circuits (IPFA).

High temperature stability of Al2O3 dielectrics on Si: Interfacial metal diffusion and mobility degradation

Supratik Guha, Evgeni P. Gusev, Paul Ronsheim, 2002 .

Compatibility Challenges for High-ĸ Materials Integration into CMOS Technology

Supratik Guha, Douglas A. Buchanan, Evgeni P. Gusev, 2002 .

Threshold Voltage Control in PMOSFETs with Polysilicon or Fully-Silicided Gates on Hf-Based Gate Dielectric Using Controlled Lateral Oxidation

Anabela Veloso, Marc Heyns, Matty Caymax, 2006 .

Zero-thickness multi work function solutions for N7 bulk FinFETs

N. Horiguchi, T. Schram, P. Matagne, 2016, 2016 IEEE Symposium on VLSI Technology.

The impact of sub monolayers of HfO2 on the device performance of high-K based transistors

Luigi Pantisano, Marc Heyns, Yasuhiro Shimamoto, 2003 .

(Invited) Replacement Metal Gate/High-k Last Technology for Aggressively Scaled Planar and FinFET-Based Devices

Naoto Horiguchi, Eddy Simoen, Anabela Veloso, 2014 .