T. Ivers

High performance 65 nm SOI technology with dual stress liner and low capacitance SRAM cell

D. Mocuta, C. Norris, C. Radens, 2005, Digest of Technical Papers. 2005 Symposium on VLSI Technology, 2005..

Reliability, yield, and performance of a 90 nm SOI/Cu/SiCOH technology

J. Gill, C.-C. Yang, A. Carbone, 2004, Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729).

A 45 nm CMOS node Cu/Low-k/ Ultra Low-k PECVD SiCOH (k=2.4) BEOL Technology

R. Augur, G. Biery, S. Arai, 2006, 2006 International Electron Devices Meeting.

High performance 65 nm SOI technology with enhanced transistor strain and advanced-low-K BEOL

J. Gill, D. Mocuta, D. Greenlaw, 2005, IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest..

Comprehensive reliability evaluation of a 90 nm CMOS technology with Cu/PECVD low-k BEOL

J. Gill, C.-C. Yang, A. Carbone, 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

Optimization of SiCOH dielectrics for integration in a 90nm CMOS technology

N. Klymko, K. Ida, A. Grill, 2004, Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729).

Thermal cycle reliability of stacked via structures with copper metallization and an organic low-k dielectric

J. Gill, G. Biery, T. Spooner, 2004, 2004 IEEE International Reliability Physics Symposium. Proceedings.

BEOL process integration with Cu/SiCOH (k=2.8) low-k interconnects at 65 nm groundrules

J. Gill, S. Nguyen, K. Ida, 2005, Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005..

Chip-to-package interaction for a 90 nm Cu / PECVD low-k technology

C.-C. Yang, A. Cowley, D. Questad, 2004, Proceedings of the IEEE 2004 International Interconnect Technology Conference (IEEE Cat. No.04TH8729).