Raminderpal Singh

发表

Analysis of GroundBounce Induced Substrate Noise Coupling in a Low Resistive Bulk Epitaxial Process: Design Strategies to Minimize Noise Effects on a MixedSignal Chip

Raminderpal Singh, 2002 .

Forming Damped LRC Parasitic Circuits in Simultaneously Switched CMOS Output Buffers

Raminderpal Singh, Raminderpal Singh, 2002 .

Modeling and Characterization

David L. Harame, Modest M. Oprysko, Raminderpal Singh, 2004 .

Modeling and Analysis of Substrate Coupling in Integrated Circuits

Raminderpal Singh, Raminderpal Singh, 2002 .

Experimental Results and Modeling Techniques for Substrate Noise in MixedSignal Integrated Circuits

Raminderpal Singh, 2002 .

Principles of Substrate Crosstalk Generation in CMOS Circuits

Raminderpal Singh, 2002 .

Special Issue on Silicon Germanium - Advanced Technology, Modeling, and Design

Bernard S. Meyerson, David L. Harame, Raminderpal Singh, 2005, Proc. IEEE.

Power Supply Noise Analysis Methodology for DeepSubmicron VLSI Chip Design

Raminderpal Singh, 2002 .