S. Womack

Extreme scaling with ultra-thin Si channel MOSFETs

H.-S.P. Wong, Ying Zhang, Leathen Shi, 2002, Digest. International Electron Devices Meeting,.

A high performance 0.13 /spl mu/m SOI CMOS technology with a 70 nm silicon film and with a second generation low-k Cu BEOL

G. Biery, S. Narasimha, J. Adkisson, 2001, International Electron Devices Meeting. Technical Digest (Cat. No.01CH37224).

Body voltage and history effect sensitivity to key device parameters in 90 nm PD-SOI

M. Sherony, S. Narasimha, Y. Kohyama, 2004, 2004 IEEE International SOI Conference (IEEE Cat. No.04CH37573).