Y. Mizushima

发表

New Degradation Phenomena of Stress-Induced Voiding Inside via in Copper Interconnects

T. Suzuki, T. Nakamura, H. Matsuyama, 2007, 2007 IEEE International Reliability Physics Symposium Proceedings. 45th Annual.

Behavior of copper contamination on backside damage for ultra-thin silicon three dimensional stacking structure

Young Suk Kim, Takayuki Ohba, Akira Uedono, 2017 .

Impact of back-grinding-induced damage on Si wafer thinning for three-dimensional integration

Takayuki Ohba, Hideki Hashimoto, Akira Uedono, 2014 .

Optimization of Via Bottom Cleaning for Bumpless Interconnects and Wafer-on-Wafer (WOW) Integration

T. Ohba, T. Ohba, Y. Mizushima, 2018, 2018 IEEE 68th Electronic Components and Technology Conference (ECTC).

Ultra thinning down to 4-µm using 300-mm wafer proven by 40-nm node 2Gb DRAM for 3D multi-stack WOW applications

H. Kitada, T. Ohba, K. Arai, 2014, 2014 Symposium on VLSI Technology (VLSI-Technology): Digest of Technical Papers.

Development of sub 10-µm ultra-thinning technology using device wafers for 3D manufacturing of terabit memory

H. Kitada, T. Ohba, T. Eshita, 2010, 2010 Symposium on VLSI Technology.

Development of low temperature dielectrics down to 150°C for multiple TSVs structure with Wafer-on-Wafer (WOW) technology

H. Kitada, T. Ohba, Y. Mizushima, 2010, 2010 IEEE International Interconnect Technology Conference.

Ultra thinning 300-mm wafer down to 7-µm for 3D wafer Integration on 45-nm node CMOS using strained silicon and Cu/Low-k interconnects

H. Kitada, T. Ohba, K. Arai, 2009, 2009 IEEE International Electron Devices Meeting (IEDM).

Characterization of Local Strain around Through-Silicon Via Interconnects by Using X-ray Microdiffraction

Young Suk Kim, Takayuki Ohba, Shigeaki Zaima, 2011 .

A robust wafer thinning down to 2.6-μm for bumpless interconnects and DRAM WOW applications

T. Ohba, K. Arai, T. Nakamura, 2015, 2015 IEEE International Electron Devices Meeting (IEDM).

Vacancy-type defects induced by grinding of Si wafers studied by monoenergetic positron beams

Takayuki Ohba, Nagayasu Oshima, Ryoichi Suzuki, 2014 .

Dependable Integration of Full-Porous Low-k Interconnect and Low-leakage/ Low-cost Transistor for 45nm LSTP Platform

T. Sugii, H. Matsuyama, S. Satoh, 2007, 2007 IEEE Symposium on VLSI Technology.

Diffusion Resistance of Low Temperature Chemical Vapor Deposition Dielectrics for Multiple Through Silicon Vias on Bumpless Wafer-on-Wafer Technology

Yoshihiro Nakata, Takayuki Ohba, Hideki Kitada, 2011 .

45 nm-node BEOL integration featuring porous-ultra-low-k/Cu multilevel interconnects

S. Nakai, H. Kitada, T. Nakamura, 2005, Proceedings of the IEEE 2005 International Interconnect Technology Conference, 2005..