Hamid Savoj

发表

Combinational techniques for sequential equivalence checking

Robert K. Brayton, David Berthelot, Alan Mishchenko, 2010, Formal Methods in Computer Aided Design.

Physical synthesis for ASIC datapath circuits

Giovanni De Micheli, Samit Chaudhuri, Terry Tao Ye, 2002, 2002 IEEE International Symposium on Circuits and Systems. Proceedings (Cat. No.02CH37353).

Sequential Equivalence Checking for Clock-Gated Circuits

Robert K. Brayton, Alan Mishchenko, Hamid Savoj, 2014, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Boolean matching in logic synthesis

Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli, Mário J. Silva, 1992, Proceedings EURO-DAC '92: European Design Automation Conference.

LEOPARD: a Logical Effort-based fanout OPtimizer for ARea and Delay

Massoud Pedram, Amir H. Ajami, Hamid Savoj, 1999, 1999 IEEE/ACM International Conference on Computer-Aided Design. Digest of Technical Papers (Cat. No.99CH37051).

${m}$ -Inductive Property of Sequential Circuits

Alan Mishchenko, Hamid Savoj, Robert Brayton, 2016, IEEE Transactions on Computer-Aided Design of Integrated Circuits and Systems.

Delay optimization of combinational logic circuits by clustering and partial collapsing

Robert K. Brayton, Hervé J. Touati, Hamid Savoj, 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

Implicit state enumeration of finite state machines using BDD's

Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli, Bill Lin, 1990, 1990 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

Session details: Session 3A: Sequential synthesis

Diana Marculescu, Hamid Savoj, 2001, ICCAD 2001.

Fast two-level logic minimizers for multi-level logic synthesis

Robert K. Brayton, Abdul A. Malik, Hamid Savoj, 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

A Delay Metric for RC Circuits Based on the Weibull Distribution

Luciano Lavagno, Malgorzata Marek-Sadowska, Rajeev Murgai, 2004 .

Sequential circuit design using synthesis and optimization

Robert K. Brayton, Alberto L. Sangiovanni-Vincentelli, Kanwar Jit Singh, 1992, Proceedings 1992 IEEE International Conference on Computer Design: VLSI in Computers & Processors.

Chemical Function Queries for 3D Database Search

Steven L. Teig, Hamid Savoj, Scott D. Kahn, 1994, J. Chem. Inf. Comput. Sci..

SLIP: a software environment for system level interactive partitioning

Robert K. Brayton, Rajeev Murgai, A. Richard Newton, 1989, 1989 IEEE International Conference on Computer-Aided Design. Digest of Technical Papers.

Extracting local don't cares for network optimization

Robert K. Brayton, Hervé J. Touati, Hamid Savoj, 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

An efficient linear time algorithm for scan chain optimization and repartitioning

David Berthelot, Samit Chaudhuri, Hamid Savoj, 2002, Proceedings. International Test Conference.

Observability relations and observability don't cares

Robert K. Brayton, Hamid Savoj, R. Brayton, 1991, 1991 IEEE International Conference on Computer-Aided Design Digest of Technical Papers.

Don't cares in multi-level network optimization

Hamid Savoj, H. Savoj, 1992 .

The use of observability and external don't cares for the simplification of multi-level networks

Robert K. Brayton, Hamid Savoj, 1991, DAC '90.

Improvements in Technology Independent Optimization of Logic Circuits

Hamid Savoj, H. Savoj, 2013 .

SIS : A System for Sequential Circuit Synthesis Electronics Research Laboratory Memorandum

Robert K. Brayton, Paul R. Stephan, Ellen M. Sentovich, 1992 .