D. Kohen

发表

Abrupt SiGe-to-Si interface: influence of chemical vapor deposition processes and characterization by different metrology techniques

V. D'costa, J. Tolle, D. Kohen, 2018, Semiconductor Science and Technology.

Electrical Properties of III-V/Oxide Interfaces

Marc Heyns, Marc Meuris, Guy Brammertz, 2009 .

Nanowire based solar cells

C. Fiegna, C. Morin, F. Ducroquet, 2014 .

Very Low Temperature Epitaxy of Group-IV Semiconductors for Use in FinFET, Stacked Nanowires and Monolithic 3D Integration

A. Hikavyy, E. Rosseel, B. Douhard, 2019, ECS Journal of Solid State Science and Technology.

Cu2ZnSn(S1−xSex)4 thin films for photovoltaic applications: Influence of the precursor stacking order on the selenization process

A. Brioude, C. Bougerol, E. Robin, 2014 .

Enhanced B doping in CVD-grown GeSn:B using B δ-doping layers

R. Loo, W. Vandervorst, J. Margetis, 2018 .

Heteroepitaxial growth of In0.30Ga0.70As high-electron mobility transistor on 200 mm silicon substrate using metamorphic graded buffer

Y. Yeo, E. Fitzgerald, K. Lee, 2016 .

Low temperature epitaxial growth of Ge:B and Ge0.99Sn0.01:B source/drain for Ge pMOS devices: in-situ and conformal B-doping, selectivity towards oxide and nitride with no need for any post-epi activation treatment

A. Hikavyy, R. Loo, L. Witters, 2019, Japanese Journal of Applied Physics.

Epitaxial GeSn: impact of process conditions on material quality

R. Loo, D. Buca, J. Margetis, 2018, Semiconductor Science and Technology.

Fundamentals of Ge1−xSnx and SiyGe1−x-ySnx RPCVD epitaxy

R. Loo, A. Mosleh, J. Margetis, 2017 .

Al catalyzed growth of silicon nanowires and subsequent in situ dry etching of the catalyst for photovoltaic application

C. Morin, A. Brioude, P. Faucherand, 2011 .

Enhanced photovoltaic performance of vapor–liquid–solid grown silicon nanowire array with radial heterojunction

C. Morin, A. Brioude, P. Faucherand, 2014 .

Cu2ZnSn(S1 xSex)4 based solar cell produced by selenization of vacuum deposited precursors

A. Brioude, N. Karst, H. Mariette, 2012 .

Patterned growth of high aspect ratio silicon wire arrays at moderate temperature

C. Morin, T. Baron, A. Brioude, 2011 .

MOCVD Growth of High Quality InGaAs HEMT Layers on Large Scale Si Wafers for Heterogeneous Integration With Si CMOS

E. Fitzgerald, S. Chua, K. Lee, 2017, IEEE Transactions on Semiconductor Manufacturing.

Aluminum catalyzed growth of silicon nanowires: Al atom location and the influence of silicon precursor pressure on the morphology

C. Morin, A. Brioude, E. D. Vito, 2012 .

The role of AsH3 partial pressure on anti-phase boundary in GaAs-on-Ge grown by MOCVD – Application to a 200 mm GaAs virtual substrate

Soon Fatt Yoon, Chuan Seng Tan, Eugene A. Fitzgerald, 2015 .

The role of AsH[subscript 3] partial pressure on anti-phase boundary in GaAs-on-Ge grown by MOCVD ? Application to a 200mm GaAs virtual substrate

C. S. Tan, E. Fitzgerald, K. Lee, 2015 .

Metalorganic chemical vapor deposition-regrown Ga-rich InGaP films on SiGe virtual substrates for Si-based III-V optoelectronic device applications

J. Michel, B. Wang, Sang-Woo Kang, 2017 .

Monolithic integration of III–V HEMT and Si-CMOS through TSV-less 3D wafer stacking

Chuan Seng Tan, David Kohen, Shuyu Bao, 2015, 2015 IEEE 65th Electronic Components and Technology Conference (ECTC).

Preventing phase separation in MOCVD-grown InAlAs compositionally graded buffer on silicon substrate using InGaAs interlayers

E. Fitzgerald, K. Lee, K. Lee, 2017 .

Growth of InGaAs-channel transistor layers on large-scale Si wafers for HeteroIntegration with Si CMOS

C. S. Tan, E. Fitzgerald, S. Chua, 2017 .

Molecular beam epitaxy passivation studies of Ge and III-V semiconductors for advanced CMOS

C. Merckling, M. Caymax, M. Heyns, 2009 .

Integration of GaAs, GaN, and Si-CMOS on a common 200 mm Si substrate through multilayer transfer process

Chuan Seng Tan, Eugene A. Fitzgerald, Li Zhang, 2016 .

Direct MOCVD epitaxy of GaAsP on SiGe virtual substrate without growth of SiGe

Soon Fatt Yoon, Bing Wang, Jurgen Michel, 2016 .

(Invited) SiGe and III-V Materials and Devices: New HEMT and LED Elements in 0.18-Micron CMOS Process and Design

G. Ng, L. Peh, C. S. Tan, 2016 .

PPAC scaling enablement for 5nm mobile SoC technology

John Zhu, Naoto Horiguchi, Suman Datta, 2017, 2017 47th European Solid-State Device Research Conference (ESSDERC).