Katsumasa Watanabe

发表

Combination of the Procedural Language and Production Language

Katsumasa Watanabe, Tatsuo Tsuji, T. Tsuji, 1985 .

Speech recognition chip for monosyllables

Takashi Horiyama, Katsumasa Watanabe, Shinji Kimura, 2001, ASP-DAC '01.

Structured FORTRAN preprocessors generating optimized output

Katsumasa Watanabe, Tatsuo Tsuji, Athushi Ikehata, 1988, Softw. Pract. Exp..

A real-time 64-monosyllable recognition LSI with learning mechanism

Takashi Horiyama, Katsumasa Watanabe, Shinji Kimura, 2001, ASP-DAC '01.

A Hardware/Software Codesign Method for a General Purpose Reconfigurable Co-Processor

Katsumasa Watanabe, Shinji Kimura, Akira Nagoya, 1997, CODES.

Exact Minimization of Free BDDs and Its Application to Pass-Transistor Logic Optimization (Special Section on VLSI Design and CAD Algorithms)

Kazuyoshi Takagi, Katsumasa Watanabe, Shinji Kimura, 1999 .

Event-oriented computing with reconfigurable platform

Masaki Nakanishi, Katsumasa Watanabe, Mitsuru Tomono, 2005, Proceedings of the ASP-DAC 2005. Asia and South Pacific Design Automation Conference, 2005..

Some Types of Parallel Algorithms

Katsumasa Watanabe, Tatsuo Tsuji, 1986 .

Waiting false path analysis of sequential logic circuits for performance optimization

Kazuyoshi Takagi, Katsumasa Watanabe, Shinji Kimura, 1998, ICCAD.

APL Interactive Processing System on a Minicomputer

Katsumasa Watanabe, Hiroshi Hagiwara, Toyohide Watanabe, 1976 .

Robust Quantum Algorithms with ε-Biased Oracles

Masaki Nakanishi, Katsumasa Watanabe, Tomoya Suzuki, 2006 .

3-Dimentional Presentation of Sign-Words from Sentential Form

Takashi Horiyama, Katsumasa Watanabe, Kaoru Sagara, 2002 .

Cheater Identifiable Quantum Secret Sharing Schemes

Masaki Nakanishi, Katsumasa Watanabe, Shigeru Yamashita, 2005 .

Quantum versus Classical Pushdown Automata in Exact Computation

Masaki Nakanishi, Katsumasa Watanabe, Shigeru Yamashita, 2005 .

Description Method of Manual Motions and Parameter Extraction for Visualization

Katsumasa Watanabe, Shinji Kimura, Kaoru Sagara, 1996 .

Robust Quantum Algorithms with epsilon-Biased Oracles

Masaki Nakanishi, Katsumasa Watanabe, Tomoya Suzuki, 2006, COCOON.

create the framework of active program from pi-expression

Masaki Nakanishi, Katsumasa Watanabe, Lo Fuchuan, 2006 .

An Environment to develop a Software by Decentralized Collaborating Programmers

Katsumasa Watanabe, Fujio Miyawaki, 2000 .

A Ratfor Preprocessor Generating Optimized Output and Its Evaluations

Katsumasa Watanabe, Tatsuo Tsuji, Atsushi Ikebata, 1985 .

Extraction of important terms that reflect the contents of English contracts

Katsumasa Watanabe, Kaoru Sagara, 1998 .

Design and Evaluation of Part-Oriented Parallel Algorithms

Katsumasa Watanabe, Tatsuo Tsuji, 1991 .

Reconfigurable 1-Bit Processor Array with Reduced Wirng Area

Masaki Nakanishi, Katsumasa Watanabe, Shigeru Yamashita, 2005, ERSA.

Robust Quantum Algorithms Computing OR with epsilon-Biased Oracles

Masaki Nakanishi, Katsumasa Watanabe, Tomoya Suzuki, 2007, IEICE Trans. Inf. Syst..

Design and Implementation of LSI for Speech Recognition with Learning Mechanism Using C Language

Takashi Horiyama, Katsumasa Watanabe, Shinji Kimura, 2000 .

Automatic Generation of Java-Based, Database-Independent Query API

Masaki Nakanishi, Katsumasa Watanabe, Toshiaki Majima, 2003 .

Timing Verification of Sequential Logic Circuits Based on Controlled Multi-Clock Path Analysis (Special Section on VLSI Design and CAD Algorithms)

Kazuyoshi Takagi, Katsumasa Watanabe, Shinji Kimura, 1998 .

An application specific Java processor with reconfigurabilities

Kazuyoshi Takagi, Katsumasa Watanabe, Shinji Kimura, 2000, Proceedings 2000. Design Automation Conference. (IEEE Cat. No.00CH37106).

Hardware Synthesis from C Programs with Estimation of Bit Length of Variables

Kazuyoshi Takagi, Katsumasa Watanabe, Shinji Kimura, 1999 .

Multi-clock path analysis using propositional satisfiability

Katsumasa Watanabe, Shinji Kimura, Kazuhiro Nakamura, 2000, ASP-DAC.

A method of constructing large-scale program processor for 8-bit system utilizing memory mapping feature

Katsumasa Watanabe, Tatsuo Tsuji, Kazuto Kontani, 1987, Systems and Computers in Japan.

One Inference Mechanism based on Automated Theorem Proving

Katsumasa Watanabe, Tatsuo Tsuji, 1986 .

An Efficient and Effective Algorithm for Online Task Placement with I/O Communications in Partially Reconfigurable FPGAs

Masaki Nakanishi, Katsumasa Watanabe, Mitsuru Tomono, 2006, IEICE Trans. Fundam. Electron. Commun. Comput. Sci..

Bit Length Optimization of Fractional Part on Floating to Fixed Point Conversion for High-Level Synthesis

Takashi Horiyama, Masaki Nakanishi, Katsumasa Watanabe, 2003 .

An application specific Java processor with reconfigurabilities

Kazuyoshi Takagi, Katsumasa Watanabe, Shinji Kimura, 2000, ASP-DAC '00.

Hardware Resource Management on Computer Systems with Reconfigurable Hardware

Katsumasa Watanabe, Shinji Kimura, Yasufumi Itoh, 1997 .

A Parallel Transduction Method using Parallel BDD Manipulation

Katsumasa Watanabe, Shinji Kimura, Futoshi Matsumoto, 1995 .

Look Up Table Compaction Based on Folding of Logic Functions

Masaki Nakanishi, Katsumasa Watanabe, Shinji Kimura, 2002 .