Tianxiang Wu

发表

A 151-to-173 GHz FMCW Transmitter Achieving 14 dBm Psat with synchronized Injection-Locked Power Amplifiers and Five in-Phase Power Combining Doublers in 65nm CMOS

Junyan Ren, Shunli Ma, Tianxiang Wu, 2018, 2018 IEEE Radio Frequency Integrated Circuits Symposium (RFIC).

A 120–150 GHz Power Amplifier in 28-nm CMOS Achieving 21.9-dB Gain and 11.8-dBm Psat for Sub-THz Imaging System

Junyan Ren, Yong Chen, Shunli Ma, 2021, IEEE Access.

Analog Integrated Circuits Based on Wafer-Level Two-Dimensional MoS2 Materials With Physical and SPICE Model

Yan Wang, Shunli Ma, Hongwei Tang, 2020, IEEE Access.

A 619-pixel machine vision enhancement chip based on two-dimensional semiconductors

P. Zhou, W. Bao, J. Wan, 2022, Science advances.

A 5G Wireless Event-Driven Sensor Chip for Online Power-Line Disturbances Detecting Network in 0.25 μm GaAs Process

Shunli Ma, Junyan Ren, Tianxiang Wu, 2021, IEEE Transactions on Industrial Electronics.

A 0.2-Terahertz Ceramic Relic Detection System Based on Iterative Threshold Filtering Imaging and Neural Network

Yong Chen, Shunli Ma, Tianxiang Wu, 2021, Electronics.

A 90‐ to 115‐GHz superheterodyne receiver front‐end for W‐band imaging system in 28‐nm complementary metal‐oxide‐semiconductor

Zhi-Li Zhang, Junyan Ren, Yong Chen, 2022, International Journal of Circuit Theory and Applications.

Mechanisms and Performance Analysis of GaN-Based Micro-LED Grown on Pattern Sapphire Substrate by Laser Lift-Off Process

Tianxiang Wu, Wenya Tian, X. Cao, 2022, ECS Journal of Solid State Science and Technology.

An artificial neural network chip based on two-dimensional semiconductor.

Yan Wang, Yin Wang, Shunli Ma, 2020, Science bulletin.

A Sub-6G SP32T Single-Chip Switch with Nanosecond Switching Speed for 5G Applications in 0.25 μm GaAs Technology

Junyan Ren, Yong Chen, Shunli Ma, 2021, Electronics.

Research on Flip-Chip Bonding Process and Thermal Cycle Reliability Simulation of 3-D Stacked Structure

Junhui Li, Tianxiang Wu, Wenya Tian, 2022, IEEE Transactions on Components, Packaging and Manufacturing Technology.

A 35-to-50 GHz CMOS Low-Noise Amplifier with 22.2% -1-dB Fractional Bandwidth and 30.5-dB Maximum Gain for 5G New Radio

Junyan Ren, Tianxiang Wu, Dong Wei, 2021, ESSCIRC 2021 - IEEE 47th European Solid State Circuits Conference (ESSCIRC).

A 124–152 GHz > 15-dBm $\mathbf{P}_{\text{sat}}$ 28-nm CMOS PA Using Chebyshev Artificial- Transmission-Line-Based Matching for Wideband Power Splitting and Combining

Junyan Ren, Yong Chen, Shunli Ma, 2022, Radio Frequency Integrated Circuits Symposium.

A 5-8 GHz Wideband and Low Phase Noise Cross-Coupled LC VCO Using 6-bit DCCA in 40nm CMOS Process

Junyan Ren, Shunli Ma, Tianxiang Wu, 2022, IEEE International Conference on Solid-State and Integrated Circuit Technology.

A 10‐MHz to 50‐GHz low‐jitter multiphase clock generator for high‐speed oscilloscope in 0.15‐μm GaAs technology

Junyan Ren, Yong Chen, Shunli Ma, 2021, Int. J. Circuit Theory Appl..

Hybrid neuromorphic hardware with sparing 2D synapse and CMOS neuron for character recognition.

Shuiyuan Wang, Shunli Ma, Tianxiang Wu, 2023, Science bulletin.

An artificial neural network chip based on two-dimensional semiconductor.

Pengcheng Zhou, Y. Chai, W. Bao, 2021, Science bulletin.