Guy Estaves

发表

A Testbench for Validation of DST Fault-Tolerant Architectures on PowerPC G4 COTS Microprocessors

Michel Pignol, Thierry Parrain, Christian Boleat, 2011 .

Development of a Testbench for Validation of DMT and DT2 Fault-Tolerant Architectures on SOI PowerPC7448

Michel Pignol, Thierry Parrain, Guy Estaves, 2008, 2008 14th IEEE International On-Line Testing Symposium.