K. Nakajima

A new technique of multi-layer thermal analysis for VLSI chips

K. Nakabayashi, K. Nakajima, Hajimu Iida, 2007 .

Evaluation of the efficiency of the Partially Solving Method (PSM) in comparison with the Gaussian elimination method

M. Osano, K. Nakajima, M. Tanimoto, 1998 .

Logic Foundry: Rapid Prototyping for FPGA-Based DSP Systems

S. Bhattacharyya, K. Nakajima, G. Spivey, 2003, Proceedings of the ASP-DAC Asia and South Pacific Design Automation Conference, 2003..

A Threshold Logic-Based Reconfigurable Logic Element with a New Programming Technology

Hiroshi Sawada, Kazuo Aoyama, Kazuo Nakajima, 2000, FPL.

A new efficient solution method for a system of linear equations: Partially Solving Method (PSM)

Minetada Osano, Kazuo Nakajima, Mitsumori Tanimoto, 1996 .

Algorithm-based low-power DSP system design: methodology and verification

An-Yeu Wu, Kui Liu, Shang-Chieh Liu, 1995, VLSI Signal Processing, VIII.

Complexity Results for Scheduling Tasks with Discrete Starting Times

S. Louis Hakimi, Kazuo Nakajima, S. Hakimi, 1982, J. Algorithms.

Logic Foundry: A Rapid Prototyping Tool for FPGA-based DSP Systems

Shuvra S. Bhattacharyya, Kazuo Nakajima, Gary Spivey, 2002 .

Exact algorithms for multilayer topological via minimization

Toshinobu Kashiwabara, Kazuo Nakajima, Chong S. Rim, 1989, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

Crossing Minimization in Linear Embeddings of Graphs

Sumio Masuda, Toshinobu Kashiwabara, Kazuo Nakajima, 1990, IEEE Trans. Computers.

Yield enhancement of programmable ASIC arrays by reconfiguration of circuit placements

Kazuo Nakajima, Anton T. Dahbura, Chong S. Rim, 1994, IEEE Trans. Comput. Aided Des. Integr. Circuits Syst..

A component architecture for FPGA-based, DSP system design

Shuvra S. Bhattacharyya, Kazuo Nakajima, Gary Spivey, 2002, Proceedings IEEE International Conference on Application- Specific Systems, Architectures, and Processors.