Rohit K. Sharma

Process variations aware area efficient negative bit-line voltage scheme for improving write ability of SRAM in nanometer technologies

A. K. Gupta, Ankur Goel, Rohit K. Sharma, 2012, IET Circuits Devices Syst..

Area efficient diode and on transistor inter-changeable power gating scheme with trim options for SRAM design in nano-complementary metal oxide semiconductor technology

A. Gupta, Rohit K. Sharma, A. Goel, 2014, IET Circuits Devices Syst..

Effect of Mutual Inductance and Coupling Capacitance on Propagation Delay and Peak Overshoot in Dynamically Switching Inputs

Brajesh Kumar Kaushik, Devendra Kumar Sharma, Rohit K. Sharma, 2010, 2010 3rd International Conference on Emerging Trends in Engineering and Technology.