Z. Lun

Investigation of retention behavior for 3D charge trapping NAND flash memory by 2D self-consistent simulation

Gang Du, Yi Wang, Zhiyuan Lun, 2014, 2014 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).

Investigation of the impact of grain boundary on threshold voltage of 3-D MLC NAND flash memory

Lei Shen, Gang Du, Yi Wang, 2015, 2015 Silicon Nanoelectronics Workshop (SNW).

Simulation on endurance characteristic of charge trapping memory

Jinfeng Kang, G. Du, Xiaoyan Liu, 2013, 2013 International Conference on Simulation of Semiconductor Processes and Devices (SISPAD).

Reliability investigation of high-k/metal gate in nMOSFETs by three-dimensional kinetic Monte-Carlo simulation with multiple trap interactions

G. Du, Xiaoyan Liu, Yijiao Wang, 2016 .

Performance of pentacene thin film transistors fabricated with different deposition speeds

Dedong Han, Lei Sun, Z. Lun, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.

Modeling of program Vth distribution for 3-D TLC NAND flash memory

Gang Du, Zhiyuan Lun, Wangyong Chen, 2019, Science China Information Sciences.

The Method of Predicting Retention Threshold Voltage Distribution for NAND Flash Memory Based on Back-Propagation Neural Network

Gang Du, Xiaoyan Liu, Zhiyuan Lun, 2019, 2019 IEEE 11th International Memory Workshop (IMW).

A two-dimensional simulation method for investigating charge transport behavior in 3-D charge trapping memory

Yi Wang, G. Du, Xiaoyan Liu, 2016, Science China Information Sciences.

Investigation of self-heating effect in SOI-LDMOS by device simulation

G. Du, Xiaoyan Liu, Yijiao Wang, 2012, 2012 IEEE 11th International Conference on Solid-State and Integrated Circuit Technology.